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LMC555CBPEVAL データシート(PDF) 5 Page - National Semiconductor (TI) |
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LMC555CBPEVAL データシート(HTML) 5 Page - National Semiconductor (TI) |
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5 / 12 page ![]() Application Info MONOSTABLE OPERATION In this mode of operation, the timer functions as a one-shot ( Figure 1). The external capacitor is initially held discharged by internal circuitry. Upon application of a negative trigger pulse of less than 1/3 V S to the Trigger terminal, the flip-flop is set which both releases the short circuit across the capaci- tor and drives the output high. The voltage across the capacitor then increases exponen- tially for a period of t H = 1.1 RAC, which is also the time that the output stays high, at the end of which time the voltage equals 2/3 V S. The comparator then resets the flip-flop which in turn discharges the capacitor and drives the output to its low state. Figure 2 shows the waveforms generated in this mode of operation. Since the charge and the threshold level of the comparator are both directly proportional to supply voltage, the timing internal is independent of supply. Reset overrides Trigger, which can override threshold. Therefore the trigger pulse must be shorter than the desired t H. The minimum pulse width for the Trigger is 20ns, and it is 400ns for the Reset. During the timing cycle when the output is high, the further application of a trigger pulse will not effect the circuit so long as the trigger input is returned high at least 10µs before the end of the timing interval. However the cir- cuit can be reset during this time by the application of a negative pulse to the reset terminal. The output will then re- main in the low state until a trigger pulse is again applied. When the reset function is not use, it is recommended that it be connected to V + to avoid any possibility of false triggering. Figure 3 is a nomograph for easy determination of RC values for various time delays. Note: In monstable operation, the trigger should be driven high before the end of timing cycle. ASTABLE OPERATION If the circuit is connected as shown in Figure 4 (Trigger and Threshold terminals connected together) it will trigger itself and free run as a multivibrator. The external capacitor charges through R A +RB and discharges through RB. Thus the duty cycle may be precisely set by the ratio of these two resistors. In this mode of operation, the capacitor charges and dis- charges between 1/3 V S and 2/3 VS. As in the triggered mode, the charge and discharge times, and therefore the fre- quency are independent of the supply voltage. Figure 5 shows the waveform generated in this mode of operation. DS008669-4 FIGURE 1. Monostable (One-Shot) DS008669-10 VCC = 5V Top Trace: Input 5V/Div. TIME = 0.1 ms/Div. Middle Trace: Output 5V/Div. RA = 9.1kΩ Bottom Trace: Capacitor Voltage 2V/Div. C = 0.01µF FIGURE 2. Monostable Waveforms DS008669-11 FIGURE 3. Time Delay DS008669-5 FIGURE 4. Astable (Variable Duty Cycle Oscillator) www.national.com 5 |
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