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PCA9513 データシート(PDF) 3 Page - Integrated Circuit Systems

部品番号 PCA9513
部品情報  Hot swappable IC and SMBus bus buffer
PDF  20 Pages
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メーカー  ICST [Integrated Circuit Systems]
ホームページ  http://www.icst.com
Logo ICST - Integrated Circuit Systems

PCA9513 データシート(HTML) 3 Page - Integrated Circuit Systems

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Philips Semiconductors
Product data sheet
PCA9513; PCA9514
Hot swappable I2C and SMBus bus buffer
2004 Oct 05
3
PIN CONFIGURATION
1
2
3
4
ENABLE
GND
SCLIN
SDAOUT
SDAIN
READY
5
6
7
8
VCC
SCLOUT
SW01045
TOP VIEW
Figure 1. Pin configuration.
PIN DESCRIPTION
PIN
SYMBOL
DESCRIPTION
1
ENABLE
Chip enable pin. Grounding this pin puts the
part in a low current (< 1
µA) mode. It also
disables the rise time accelerators, isolates
SDAIN from SDAOUT and isolates SCLIN
from SCLOUT.
2
SCLOUT
Serial clock output to and from the SCL bus
on the card.
3
SCLIN
Serial clock input to and from the SCL bus
on the backplane.
4
GND
Ground. Connect this pin to a ground plane
for best results.
5
READY
This is an open-drain output which pulls
LOW when SDAIN and SCLIN are
disconnected from SDAOUT and SCLOUT,
and turns off when the two sides are
connected.
6
SDAIN
Serial data input to and from the SDA bus on
the backplane.
7
SDAOUT
Serial data output to and from the SDA bus
on the card.
8
VCC
Power supply.
FEATURE SELECTION CHART
FEATURES
PCA9510
PCA9511
PCA9512
PCA9513
PCA9514
Idle detect
Yes
Yes
Yes
Yes
Yes
high-impedance SDA, SCL pins for VCC = 0 V
Yes
Yes
Yes
Yes
Yes
Rise time accelerator circuitry on all SDA and SCL lines
Yes
Yes
Yes
Yes
Rise time accelerator circuitry hardware disable pin for lightly loaded systems
Yes
Rise time accelerator threshold 0.8 V vs 0.6 V improves noise margin
Yes
Yes
Ready open drain output
Yes
Yes
Yes
Yes
Two VCC pins to support 5 V to 3.3 V level translation with improved noise
margins
Yes
1 V precharge on all SDA and SCL lines
IN only
Yes
Yes
92
µA current source on SCLIN and SDAIN for PICMG applications
Yes



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