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EVAL6730 データシート(PDF) 5 Page - STMicroelectronics |
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EVAL6730 データシート(HTML) 5 Page - STMicroelectronics |
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5 / 9 page ![]() EVAL6730 Features 5/9 The over-current-protection limit is set at 15 A but it can be changed by replacing the resistors R1 and R12 (see OCL and OCH pin). ● Vcc-Gndcc: Using the input voltage to supply the controller no power is required at this input. However the controller can be supplied separately from the power stage through the Vcc input (4.5- 14V) and, in this case, jumper G1 must be left open. ● VCCDR: An internal LDO provides the power into the device. The input of this stage is the Vcc pin and the output (5 V) is the VCCDR pin. The LDO can be bypassed, providing directly a 5 V voltage from VCCDR and Gndcc. In this case the pins 1 and 3 of the jumper G1 must be shorted. ● TP1: This pin can be used as an input or as a test point. If all the jumper G2 pins are shorted, TP1 can be used as a test point of the voltage at the EAREF pin. If the pins 2 and 3 of G2 are connected together, TP1 can be used as an input to provide an external reference for the internal error amplifier. ● TP2: This test point is connected to the Tmask pin. ● TP3: This test point is connected to the S/O/U pin. ● SYNCH: This pin is connected to the synch pin of the controller. ● PWRGD: This pin is connected to the PGOOD pin of the controller. ● DIP SWITCH Different positions of the dip switch correspond to different settings of the multifunction pin (S/O/U) (CC/O/U). Table 4. Dip switch UVLO OVP SINK CC Vsou/ VBCCDRBBB DIP SWITCH STATE 5 V Not latched Not 0 S7 A 5 V Not latched Yes 0.2 S1-S7 B 5 V Latched Not 0.3 S2-S7 C 5 V Latched Yes 0.4 S3-S7 D 12 V Not latched Not 0.5 S4-S7 E 12 V Not latched Yes 0.6 S5-S7 F 12 V Latched Not 0.7 S6-S7 G 12 V Latched Yes 1 S1 H |
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