LT5546

7

5546f

BLOCK DIAGRA

2

2

IF DET

EN

STBY

+

–

+

–

90

°

0

°

5546 BD

÷2

2

5

8

7

14

13

15

16

3

6

11

10

9

1

4

17

12

VGA

I-MIXER

Q-MIXER

CLIPPER

CLIPPER

LPF

LPF

DETECTOR

The LT5546 consists of a variable gain amplifier (VGA),

I/Q demodulator, quadrature LO generator, lowpass fil-

ters (LPFs), clipping amplifiers (clippers) and bias cir-

cuitry.

The IF signal is fed to the inputs of the VGA. The VGA gain

is typically set by an external signal in such a way that the

amplified IF signal delivered to the I/Q mixers is constant.

The IF signal is then converted into I/Q baseband signals

using the I/Q down-converting mixers. The quadrature LO

signals that drive the mixers are internally generated from

the on-chip divide-by-two circuit. The I/Q signals are

passed through first-order low-pass filters and subse-

quently a pair of hard-clipping amplifiers (clippers). After

externally setting the required gain, these amplifiers should

not clip. However, in the event of overload, they reduce the

settling time of any (optional) external AC coupling capaci-

tors by preventing asymmetrical charging and discharg-

ing effects. The I/Q baseband outputs are buffered by

output drivers.

VGA and Input Matching

The VGA has a nominal 60dB gain control range with a

frequency range of 40MHz to 500MHz. The inputs of the

VGA must have a DC return to ground. This can be done

using a transformer with a central tap (on the secondary)

or an LC matching circuit with a matched impedance at the

frequency of interest and near zero impedance at DC. The

differential AC input impedance of the LT5546 is about

200

Ω, thus a 1:4 (impedance ratio) RF transformer with

center tap can be used. In Figure 6, the evaluation board

APPLICATIO S I FOR ATIO

schematic is shown using a 1:4 transformer. The mea-

sured input sensitivity of this board is about –80.5dBm for

a 10dB signal-to-noise ratio. In the case of an L-C match-

ing circuit, the circuit of Figure 1 can be used. In Table 1

the matching network component values are given for a

range of IF frequencies. The matching circuit of Figure 1

approaches 180

broad range around its center frequency. However, some

amplitude mismatch occurs if the circuit is not tuned to the

center frequency. This leads to reduced circuit linearity

performance, because one of the inputs carries a higher

signal compared to the perfectly balanced case. A 10%

frequency shift from the center frequency results in about

results in a 1.5dB higher IM3 contribution from the input

stage which leads to a 0.75dB drop in IIP3. Moreover, the

IIP2 of the circuit is also reduced which can lead to a higher

second order harmonic contribution. The circuit can be

driven single ended, but this is not recommended because

it leads to a 3dB drop in gain and a considerable increase

in IM5 and IM7 components. The single-ended noise

figure increases by 4dB if one IF input is directly grounded

and increases by 1.5dB if one IF input is grounded via a

1

µH inductor. An IF input cannot be left open or connected

via a resistor to ground because this will disturb the

internal biasing, reducing the gain, noise and linearity

performance. For optimal performance, it is important to

keep the DC impedance to ground of both IF inputs lower

than 2

Ω. In the matching network of Figure 1, inductor L3