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STGIPS10C60 データシート(PDF) 11 Page - STMicroelectronics |
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STGIPS10C60 データシート(HTML) 11 Page - STMicroelectronics |
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11 / 20 page  DocID025059 Rev 3 11/20 STGIPS10C60 Electrical characteristics 20 3.2 Waveforms definition Figure 5. Dead time and interlocking waveforms definition LIN HIN LVG HVG LIN HIN LVG HVG LIN HIN LVG HVG LIN HIN LVG HVG DTLH DTHL DTLH DTHL DTLH DTHL DTLH DTHL gate driver outputs OFF (HALF-BRIDGE TRI-STATE) CONTROL SIGNAL EDGES OVERLAPPED: INTERLOCKING + DEAD TIME CONTROL SIGNALS EDGES SYNCHRONOUS (*): DEAD TIME CONTROL SIGNALS EDGES NOT OVERLAPPED, BUT INSIDE THE DEAD TIME: DEAD TIME CONTROL SIGNALS EDGES NOT OVERLAPPED, OUTSIDE THE DEAD TIME: DIRECT DRIVING gate driver outputs OFF (HALF-BRIDGE TRI-STATE) gate driver outputs OFF (HALF-BRIDGE TRI-STATE) gate driver outputs OFF (HALF-BRIDGE TRI-STATE) gate driver outputs OFF (HALF-BRIDGE TRI-STATE) gate driver outputs OFF (HALF-BRIDGE TRI-STATE) gate driver outputs OFF (HALF-BRIDGE TRI-STATE) gate driver outputs OFF (HALF-BRIDGE TRI-STATE) |
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