SN54ALS191, SN54ALS191

SYNCHRONOUS 4-BIT UP/DOWN DECADE COUNTERS

SDAS210 – D2661, DECEMBER 1982 – REVISED MAY 1986

POST OFFICE BOX 655303

3

13

RCO

3(CT=9)Z6

C5

[8]

[4]

[2]

[1]

5D

1,2–/1,3+

G4

M3 (UP)

M2 (DOWN)

G1

7

QD

6

QC

2

QB

3

QA

MAX/MIN

12

2(CT=0)Z6

CTRDIV10

9

D

10

C

1

B

15

A

11

LOAD

14

CLK

4

CTEN

D/U

5

6,1,4

’ALS191 logic diagram (positive logic)

CTEN

D/U

CLK

LOAD

A

B

C

10

9

1

15

11

14

5

4

12

MAX/MIN

13

RCO

1D

S

R

QD

7

C1

1D

S

R

QC

6

C1

C1

2

QB

R

S

1D

1D

S

R

QA

3

C1

D

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for D, J, and N packages.