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ST72321RX データシート(PDF) 13 Page - STMicroelectronics |
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ST72321RX データシート(HTML) 13 Page - STMicroelectronics |
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13 / 193 page  ST72321Rx ST72321ARx ST72321Jx 13/193 ISTICS for more details. 3. OSC1 and OSC2 pins connect a crystal/ceramic resonator, or an external source to the on-chip oscil- lator; see Section 1 DESCRIPTION and Section 12.5 CLOCK AND TIMING CHARACTERISTICS for more details. 4. On the chip, each I/O port may have up to 8 pads: – ads that are not bonded to external pins are forced by hardware in input pull-up configuration after reset. The configuration of these pads must be kept at reset state to avoid added current consumption. 5. Pull-up always activated on PE2 see limitation Section 15.4.6. 6. It is mandatory to connect all available VDD and VREF pins to the supply voltage and all VSS and VSSA pins to ground. |
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