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HCF4021 データシート(PDF) 7 Page - STMicroelectronics

部品番号 HCF4021
部品情報  Asynchronous parallel input or synchronous serial-in/serial-out 8-stage static shift register
PDF  13 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

HCF4021 データシート(HTML) 7 Page - STMicroelectronics

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DocID008216 Rev 3
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HCF4021
Electrical characteristics
13
Table 7. Dynamic electrical characteristics (Tamb = 25 °C, CL = 50 pF, RL = 200 k, tr =
tf = 20 ns)
Symbol
Parameter
Test condition
Value(1)
1. The typical temperature coefficient for all VDD values is 0.3 %/°C.
Unit
VDD (V)
Min.
Typ.
Max.
tPLH, tPHL Propagation delay time
5
160
320
ns
10
80
160
15
60
120
tTHL, tTLH Transition time
5
100
200
10
50
100
15
40
80
fCL(2)
2. If more than one unit is cascaded, trCL should be made less than or equal to the sum of the transition time
and the fixed propagation delay of the output of the driving stage of the estimated capacitive load.
Maximum clock input frequency
53
6
MHz
10
6
12
15
8.5
17
tw
Clock pulse width
5
180
90
ns
10
80
40
15
50
25
tr , tf
Clock input rise or fall time
5
15
s
10
15
ts
Minimum setup time, serial input
tH  200 ns
(ref to CL)
5
120
60
ns
10
80
40
15
60
30
Minimum setup time, parallel
inputs
tH  200 ns
(ref to P/S)
550
25
10
30
15
15
20
10
th
Hold time, serial in, parallel in,
parallel/serial control
5
0
10
15
tWH
P/S pulse width
5
160
80
10
80
40
15
50
25
trem
P/S removal time
ref to CL)
5
280
140
10
140
70
15
100
50



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