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ST2329I データシート(PDF) 13 Page - STMicroelectronics

部品番号 ST2329I
部品情報  2-bit dual-supply level translator with auto-direction feature and integrated pull-up
PDF  22 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST2329I データシート(HTML) 13 Page - STMicroelectronics

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ST2329I
Pin configuration
Doc ID 018508 Rev 1
13/22
2.3
AC characteristics (device driven by totem pole driver)
Table 10.
For test conditions: VL = 1.65 to 1.8 V (load CL = 15 pF; Rup = 10 kΩ;
driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C
Symbol
Parameter
VCC = 1.8 - 2.5 V VCC = 2.7 - 3.6 V VCC = 4.3 - 5.5 V
Unit
Min.
Max.
Min.
Max.
Min.
Max.
tRVCC
Rise time I/OVCC
7.2
4.6
1.4
ns
tFVCC
Fall time I/OVCC
23.2
33.9
53.3
ns
tRVL
Rise time I/OVL
5.9
5.7
5.5
ns
tFVL
Fall time I/OVL
16.4
17.6
16.9
ns
tI/OVL-VCC
Propagation delay time
I/OVL-LH to I/OVCC-LH
I/OVL-HL to I/OVCC-HL
tPLH
5.5
4.1
3.6
ns
tPLH
13.9
19.1
30.2
ns
tI/OVCC-VL
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-HL
tPLH
4.5
3.9
3.6
ns
tPLH
8.6
9.0
9.5
ns
tPZL tPZH
tPLZ tPHZ
Output enable and disable time
En
10
10
10
ns
Dis
40
40
40
ns
DR
Data rate(1)
6.4
4.5
3.0
MHz
1.
The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O
signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation is not less than 30%.
Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up resistor, an
effective value of 4.7 k
Ω is obtained by adding an external 8.9 kΩ pull-up resistor.
Table 11.
For test conditions: VL = 2.5 to 2.7 V (load CL = 15 pF; Rup = 10 kΩ;
driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C
Symbol
Parameter
VCC = 2.7 - 3.6 V
VCC= 4.3 - 5.5 V
Unit
Min.
Max.
Min.
Max.
tRVCC
Rise time I/OVCC
3.8
2.8
ns
tFVCC
Fall time I/OVCC
14.8
19.1
ns
tRVL
Rise time I/OVL
3.3
3.2
ns
tFVL
Fall time I/OVL
9.8
10.0
ns
tI/OVL-VCC
Propagation delay time
I/OVL-LH to I/OVCC-LH
I/OVL-HL to I/OVCC-HL
tPLH
3.2
2.8
ns
tPLH
8.2
11.6
ns
tI/OVCC-VL
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-HL
tPLH
2.6
2.0
ns
tPLH
5.3
5.9
ns
tPZL tPZH
tPLZ tPHZ
Output enable and disable time
En
6
6
ns
Dis
40
40
ns
DR
Data rate(1)
96.8
MHz
1.
The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O
signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation is not less than 30%.
Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up resistor, an
effective value of 4.7 k
Ω is obtained by adding an external 8.9 kΩ pull-up resistor.



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