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STA533WF データシート(PDF) 11 Page - STMicroelectronics

部品番号 STA533WF
部品情報  Multipower BCD technology
PDF  15 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STA533WF データシート(HTML) 11 Page - STMicroelectronics

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STA533WF
Heatsink requirements
Doc ID 17658 Rev 2
11/15
4
Heatsink requirements
Using the STA533WF mounted on a double-layer PCB having 2 copper ground areas of
3x3cm2 and with 16 via holes the junction to ambient thermal resistance is approximately
24 °C/W in natural air convection.
Figure 8.
Double-layer PCB with copper ground areas and 16 via holes
With the dissipated power within the device depending primarily on the supply voltage, the
load impedance and the output modulation level, the maximum estimated dissipated power,
Pdmax, for the STA533WF is:
4 W for 2 x 20 W into 8
Ω at 18 V
< 5 W for 2 x 10 W into 8
Ω + 1 x 20 W into 4 Ω at 18 V.
The figure below shows the power derating curve for the PowerSSO36 EPD package on
PCBs with copper areas of 2 x 2 cm2 and 3 x 3 cm2.
Figure 9.
Power derating curves for PCB used as heatsink
0
1
2
3
4
5
6
7
8
0
20
40
60
80
100
120
140
160
Pd (W)
Tamb ( °C)
Copper Area 2x2 cm
and via holes
TDA7491P
PSSO36
Copper Area 3x3 cm
and via holes
STA533WF
PowerSSO36



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