データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

STPMS2L-PUR データシート(PDF) 21 Page - STMicroelectronics

部品番号 STPMS2L-PUR
部品情報  Programmable chopper-stabilized low noise and low offset amplifier
PDF  36 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPMS2L-PUR データシート(HTML) 21 Page - STMicroelectronics

Back Button STPMS2L-PUR Datasheet HTML 17Page - STMicroelectronics STPMS2L-PUR Datasheet HTML 18Page - STMicroelectronics STPMS2L-PUR Datasheet HTML 19Page - STMicroelectronics STPMS2L-PUR Datasheet HTML 20Page - STMicroelectronics STPMS2L-PUR Datasheet HTML 21Page - STMicroelectronics STPMS2L-PUR Datasheet HTML 22Page - STMicroelectronics STPMS2L-PUR Datasheet HTML 23Page - STMicroelectronics STPMS2L-PUR Datasheet HTML 24Page - STMicroelectronics STPMS2L-PUR Datasheet HTML 25Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 21 / 36 page
background image
STPMS2
Theory of operation
DocID16525 Rev 5
21/36
LPR (low precision): fCLK = 1 MHz and settings defined by MS0 through MS3
HPR (high precision): the normal mode of operation with fCLK = 2 MHz to 4 MHz
The STPMS2 performs operations in 2 basic modes: hard mode and soft mode. In hard
mode the configuration is set through external pins MS0, MS1, MS2 and MS3. In soft
mode, 40 configuration bits can be accessed through CFG[39:0], via serial communication.
The pins used for serial communication are: MS0, MS1 and MS2. Switching between hard
and soft mode is achieved through pin MS3.
Hard mode: in this case the device configuration is bootstrapped at startup and signals
come from VIN and VIP for voltage channels, and CIP and CIN for current channels or
from internal BIST DAC.
Soft mode: in this mode all possible settings from hard mode are accessible, as well
as the additional settings.
Figure 17: Block diagram of the modulator
The STPMS2 sends selected signals based on the configuration to the DAT and DATn
pins. Both outputs have cross-current and slew rate limiters to prevent excessive current
spikes on supply lines.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com