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X5083P データシート(PDF) 15 Page - Xicor Inc.

部品番号 X5083P
部品情報  CPU Supervisor with 8Kbit SPI EEPROM
PDF  21 Pages
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メーカー  XICOR [Xicor Inc.]
ホームページ  http://www.xicor.com
Logo XICOR - Xicor Inc.

X5083P データシート(HTML) 15 Page - Xicor Inc.

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X5083
Characteristics subject to change without notice.
15 of 21
REV 1.1.6 6/25/02
www.xicor.com
Power-Up and Power-Down Timing
RESET Output Timing
Note:
(5) This parameter is periodically sampled and not 100% tested.
(6) PT= Package/Temperature
CS vs. RESET Timing
RESET Output Timing
Symbol
Parameter
Min.
Typ.
Max.
Unit
VTRIP
Reset trip point voltage, X5083PT-4.5A (See note 6)
Reset trip point voltage, X5083PT
Reset trip point voltage, X5083PT-2.7A
Reset trip point voltage, X5083PT-2.7
4.5
4.25
2.85
2.55
4.63
4.38
2.93
2.63
4.75
4.5
3.00
2.7
V
tPURST
Power-up reset time out
100
200
280
ms
tRPD
(5)
VCC detect to reset/output
500
ns
tF
(5)
VCC fall time
0.1
ns
tR
(5)
VCC rise time
0.1
ns
VRVALID
Reset valid VCC
1V
Symbol
Parameter
Min.
Typ.
Max.
Unit
tWDO
Watchdog time out period,
WD1 = 1, WD0 = 1(default)
WD1 = 1, WD0 = 0
WD1 = 0, WD0 = 1
WD1 = 0, WD0 = 0
100
450
1
OFF
200
600
1.4
300
800
2
ms
ms
sec
tCST
CS pulse width to reset the watchdog
400
ns
tRST
Reset time out
100
200
300
ms
VCC
tPURST
tPURST
tR
tF
tRPD
RESET
0 Volts
VTRIP
VTRIP
CS
tCST
RESET
tWDO
tRST
tWDO
tRST



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