WM8224 datasheet(39/50 Pages) CIRRUS

39 / 50 page

WM8224

Production Data

PD, Rev 4.2, September 2013

OPERATING MODES

Table 12 and Table 13 below show the normal operating modes of the device. The MCLK speed can

be changed along with the MCLK:VSMP ratio to achieve the desired sample rate.

16-BIT MODE

NUMBER

CHANNELS

DESCRIPTION

CDS

AVAILABLE

MAXIMUM

SAMPLE

RATE

TIMING REQUIREMENTS

SETTINGS

3 Devices Used

YES

4.4 MSPS

MCLK max = 40MHz

Minimum MCLK:VSMP ratio = 9:1

MONO = 0

TWOCHAN = 0

AUTOZ=1

ACLKDIV = 00

Dev ID

OPDEL[3:0]

0000

0100

1000

2 Devices Used

YES

6.6 MSPS

MCLK max = 40MHz

Minimum MCLK:VSMP ratio = 6:1

MONO = 0

TWOCHAN = 0

AUTOZ=1

ACLKDIV = 00

Dev ID

OPDEL[3:0]

0000

0100

3 Devices Used

YES

6.6 MSPS

MCLK max = 60MHz

Minimum MCLK:VSMP ratio = 9:1

MONO = 0

TWOCHAN = 0

AUTOZ=1

ACLKDIV = 10

Dev ID

OPDEL[3:0]

0000

0100

1000

2 Devices Used

YES

10 MSPS

MCLK max = 60MHz

Minimum MCLK:VSMP ratio = 6:1

MONO = 0

TWOCHAN = 0

AUTOZ=1

ACLKDIV = 01

Dev ID

OPDEL[3:0]

0000

0100

Three channel

Pixel-by-Pixel

YES

13.33 MSPS

MCLK max = 40MHz

Minimum MCLK:VSMP ratio = 3:1

MONO = 0

TWOCHAN = 0

Two channel

Pixel-by-Pixel

YES

20 MSPS

MCLK max = 40MHz

Minimum MCLK:VSMP ratio = 2:1

MONO = 0

TWOCHAN = 1

One channel

Pixel-by-Pixel

YES

40 MSPS

MCLK max = 40MHz

Minimum MCLK:VSMP ratio = 1:1

MONO = 1

TWOCHAN = 0

Table 12 WM8224 16-bit Normal Operating Modes

WM8224 データシート(PDF) 39 Page - Cirrus Logic

WM8224 データシート(HTML) 39 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

データシートダウンロード

リンク URL

WM8224 データシート(PDF) 39 Page - Cirrus Logic

WM8224 データシート(HTML) 39 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

データシート ダウンロード

リンク URL

データシートダウンロード