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RT5016C データシート(PDF) 37 Page - Richtek Technology Corporation |
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RT5016C データシート(HTML) 37 Page - Richtek Technology Corporation |
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37 / 68 page ![]() RT5016C 37 DS5016C-02 November 2016 www.richtek.com Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. © INT vs. Fault/Status Timing Diagram Interrupt vs. Events (I2C Status Bits) When PMU turns on with event condition During PMU on INT assert (Turn to low) No Event (0) Event has occurred (1) Event appear (0 1) Event disappear (1 0) PGOOD No Yes Yes Yes NoBAT No Yes Yes Yes TS_METER [2:0] = 000 (Event may be cold or hot, VP UVLO, NoBAT) No Yes Yes Yes EOC No Yes Yes Yes THR No Yes Yes Yes SAFE No Yes Yes Yes DPM No Yes Yes Yes CHGRUN No No No Yes Interrupt Indicator The RT5016C provides an interrupt indicator output pin (INT). INT is an open-drain output which is controlled by A9.INT bit. When the PGOOD, TS_Meter [2:0], EOC, THR, SAFE, NoBAT, CHGRUN, DPM status bits toggle, the A9.INT bit will be set to high. In order to reset the interrupt status, a “0” must be written to the A9.INT bit or power on the PMU again. The timing diagram is shown below : THR EOC PGOOD A9.INT bit is written to "0" TS_Meter [2:0] NoBAT CHGRUN DPM SAFE INT When the A9.INT bit is written to "0", the INT will be set to high. When Mask_DPM = 1 and DPM event change, the INT would not be asserted. (Mask_DPM = 0) |
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