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WM8602SEDS/V データシート(PDF) 10 Page - Wolfson Microelectronics plc

部品番号 WM8602SEDS/V
部品情報  2.1 CHANNEL PWM CONTROLLER
PDF  46 Pages
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メーカー  WOLFSON [Wolfson Microelectronics plc]
ホームページ  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8602SEDS/V データシート(HTML) 10 Page - Wolfson Microelectronics plc

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WM8602
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PP Rev 1.5 May 2004
10
AUDIO INTERFACE TIMING – SLAVE MODE
Figure 3 Digital Audio Data Timing – Slave Mode
Test Conditions
AVDD, DVDD, BVDD = 3.3V, AGND, DGND, BGND = 0V, TA = +25
oC, Slave Mode, fs = 48kHz, MCLK = 256fs, 24-bit data,
unless otherwise stated.
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
Audio Data Input Timing Information
BCLK cycle time
tBCY
50
ns
BCLK pulse width high
tBCH
20
ns
BCLK pulse width low
tBCL
20
ns
BCLK rise/fall times
5
ns
LRCLK set-up time to BCLK rising edge
tLRSU
10
ns
LRCLK hold time from BCLK rising edge
tLRH
10
ns
LRCLK rise/fall times
5
ns
DIN hold time from BCLK rising edge
tDH
10
ns
Table 5 Audio Interface Timing – Slave Mode
Note: BCLK period should always be greater than or equal to MCLK period.



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