AT75C310

8

Figure 7. Static Memory Write Cycle (Zero Wait State)

Table 6. Static Memory Write Cycle (Zero Wait State) Timings

Symbol

Parameter

Min (ns)

Max (ns)

t

CSLCSH

Chip Select Low to Chip Select High Time

40.0

–

t

CSLWL

Chip Select Low to Write Stobe Low Time

18.0

–

Address Valid to Write Strobe Low Time

17.0

–

t

BSLWL

Byte Select Low to Write Strobe Low Time

19.0

–

t

WHCSH

Write Strobe High to Chip Select High Time

3.0

–

Address Hold Time after Write Strobe High

4.0

–

t

WHBSH

Write Strobe High to Byte Strobe High Time

0

–

t

WLWH

Write Strobe Low to Write Strobe High Time

17.0

–

Data Setup Time before Write Strobe High

13.0

–

t

WHDH

Data Hold Time after Write Strobe High

3.0

–

A

NCEx

D

NWEx

(Byte Select Mode)

NWR/NWEx

(Byte Write Mode)