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LF356 データシート(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
部品番号 LF356
部品情報  JFET Input Operational Amplifiers
PDF  23 Pages
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メーカー  NSC [National Semiconductor (TI)]
ホームページ  http://www.national.com
Logo NSC - National Semiconductor (TI)

LF356 データシート(HTML) 4 Page - National Semiconductor (TI)

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Notes for Electrical Characteristics (Continued)
LF155/156
LF256/257
LF356B
LF355/6/7
Supply Voltage, V
S
±15V
≤ V
S ±20V
±15V
≤ V
S ±20V
±15V
≤ V
S ±20V
V
S= ±15V
T
A
−55˚C
≤ T
A ≤ +125˚C
−25˚C
≤ T
A ≤ +85˚C
0˚C
≤ T
A ≤ +70˚C
0˚C
≤ T
A ≤ +70˚C
T
HIGH
+125˚C
+85˚C
+70˚C
+70˚C
and VOS,IB and IOS are measured at VCM =0.
Note 4: The Temperature Coefficient of the adjusted input offset voltage changes only a small amount (0.5µV/˚C typically) for each mV of adjustment from its original
unadjusted value. Common-mode rejection and open loop voltage gain are also unaffected by offset adjustment.
Note 5: The input bias currents are junction leakage currents which approximately double for every 10˚C increase in the junction temperature, TJ. Due to limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, Pd. TJ =TA + θJA Pd where θJA is the thermal resistance from junction to ambient. Use of a heat sink is
recommended if input bias current is to be kept to a minimum.
Note 6: Supply Voltage Rejection is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practice.
Note 7: Settling time is defined here, for a unity gain inverter connection using 2 k
Ω resistors for the LF155/6. It is the time required for the error voltage (the voltage
at the inverting input pin on the amplifier) to settle to within 0.01% of its final value from the time a 10V step input is applied to the inverter. For the LF357, AV = −5,
the feedback resistor from output to input is 2k
Ω and the output step is 10V (See Settling Time Test Circuit).
Note 8: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside
guaranteed limits.
Typical DC Performance Characteristics Curves are for LF155 and LF156 unless otherwise
specified.
Input Bias Current
Input Bias Current
00564637
00564638
Input Bias Current
Voltage Swing
00564639
00564640
www.national.com
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