13

LT1933

1933f

APPLICATIO S I FOR ATIO

Figure 7. Model for Loop Response

1.245V

SW

LT1933

GND

1933 F07

R1

OUT

ESR

ERROR

AMPLIFIER

CURRENT MODE

POWER STAGE

FB

R2

500k

100k

80pF

C1

C1

150µmhos

+

0.7V

1.1mho

2.2µF ceramic capacitor at the input. The input voltage

rings as high as 35V and the input current peaks at 20A.

One method of damping the tank circuit is to add another

capacitor with a series resistor to the circuit. In Figure 6b

an aluminum electrolytic capacitor has been added. This

capacitor’s high equivalent series resistance damps the

circuit and eliminates the voltage overshoot. The extra

capacitor improves low frequency ripple filtering and can

slightly improve the efficiency of the circuit, though it is

likely to be the largest component in the circuit. An

alternative solution is shown in Figure 6c. A 1Ω resistor is

added in series with the input to eliminate the voltage

overshoot (it also reduces the peak input current). A 0.1µF

capacitor improves high frequency filtering. This solution

is smaller and less expensive than the electrolytic capaci-

tor. For high input voltages its impact on efficiency is

minor, reducing efficiency less than one half percent for a

5V output at full load operating from 24V.

Frequency Compensation

The LT1933 uses current mode control to regulate the

output. This simplifies loop compensation. In particular,

the LT1933 does not require the ESR of the output

capacitor for stability allowing the use of ceramic capaci-

tors to achieve low output ripple and small circuit size.

Figure 7 shows an equivalent circuit for the LT1933

control loop. The error amp is a transconductance ampli-

fier with finite output impedance. The power section,

consisting of the modulator, power switch and inductor, is

modeled as a transconductance amplifier generating an

Note that the output capacitor integrates this current, and

amplifier output current, resulting in two poles in the loop.

simple model works well as long as the value of the

inductor is not too high and the loop crossover frequency

is much lower than the switching frequency. With a larger

ceramic capacitor (very low ESR), crossover may be lower

divider may improve the phase margin and transient

response. Large electrolytic capacitors may have an ESR

large enough to create an additional zero, and the phase

lead may not be necessary.

If the output capacitor is different than the recommended

capacitor, stability should be checked across all operating

conditions, including load current, input voltage and tem-

perature. The LT1375 data sheet contains a more thor-

ough discussion of loop compensation and describes how

to test the stability using a transient load.

PCB Layout

For proper operation and minimum EMI, care must be

taken during printed circuit board layout. Figure 8 shows

the recommended component placement with trace,

ground plane and via locations. Note that large, switched

diode (D1) and the input capacitor (C2). The loop formed

by these components should be as small as possible and

tied to system ground in only one place. These compo-

nents, along with the inductor and output capacitor,

SHUTDOWN

VIAS TO LOCAL GROUND PLANE

OUTLINE OF LOCAL GROUND PLANE

1933 F08

SYSTEM

GROUND

C2

D1

C1

Figure 8. A Good PCB Layout Ensures Proper, Low EMI Operation