 |
データシートサーチシステム |
|
|
データシートサーチシステム |
|
P89LPC933 データシート(PDF) 13 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
P89LPC933 データシート(HTML) 13 Page - NXP Semiconductors |
|
|
13 / 75 page  xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x Table 5: Special function registers - P89LPC933/934 * indicates SFRs that are bit addressable. Name Description SFR addr. Bit functions and addresses Reset value MSB LSB Hex Binary Bit address E7 E6 E5 E4 E3 E2 E1 E0 ACC* Accumulator E0H 00 0000 0000 ADCON0 A/D control register 0 8EH - - - - - ENADC0 - - 00 0000 0000 ADCON1 A/D control register 1 97H ENBI1 ENADCI 1 TMM1 EDGE1 ADCI1 ENADC1 ADCS11 ADCS10 00 0000 0000 ADINS A/D input select A3H ADI13 ADI12 ADI11 ADI10 - - - - 00 0000 0000 ADMODA A/D mode register A C0H BNDI1 BURST1 SCC1 SCAN1 - - - - 00 0000 0000 ADMODB A/D mode register B A1H CLK2 CLK1 CLK0 - ENDAC1 ENDAC0 BSA1 - 00 000x 0000 AD0DAT3 A/D_0 data register 3 F4H 00 0000 0000 AD1BH A/D_1 boundary high register C4H FF 1111 1111 AD1BL A/D_1 boundary low register BCH 00 0000 0000 AD1DAT0 A/D_1 data register 0 D5H 00 0000 0000 AD1DAT1 A/D_1 data register 1 D6H 00 0000 0000 AD1DAT2 A/D_1 data register 2 D7H 00 0000 0000 AD1DAT3 A/D_1 data register 3 F5H 00 0000 0000 AUXR1 Auxiliary function register A2H CLKLP EBRR ENT1 ENT0 SRST 0 - DPS 00 [1] 0000 00x0 Bit address F7 F6 F5 F4 F3 F2 F1 F0 B* B register F0H 00 0000 0000 BRGR0 Baud rate generator rate low BEH 00 [2] 0000 0000 BRGR1 Baud rate generator rate high BFH 00 [1] [2] 0000 0000 BRGCON Baud rate generator control BDH - - - - - - SBRGS BRGEN 00 [2] xxxx xx00 CMP1 Comparator 1 control register ACH - - CE1 CP1 CN1 OE1 CO1 CMF1 00 [1] xx00 0000 CMP2 Comparator 2 control register ADH - - CE2 CP2 CN2 OE2 CO2 CMF2 00 [1] xx00 0000 DIVM CPU clock divide-by-M control 95H 00 0000 0000 DPTR Data pointer (2 bytes) DPH Data pointer high 83H 00 0000 0000 DPL Data pointer low 82H 00 0000 0000 FMADRH Program flash address high E7H 00 0000 0000 FMADRL Program flash address low E6H 00 0000 0000 |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか？ [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Japanese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
