FE5VC2S1 datasheet(1/1 Pages) FUTUREWAFER

部品番号	FE5VC2S1

部品情報	Chip low capacitance 2 fold ESD protection diode

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メーカー	FUTUREWAFER [FutureWafer Tech Co.,Ltd]

ホームページ	http://futurewafer.com.tw/

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Chip low capacitance 2—fold ESD protection diode

Mechanical Data

Notes

Dice size

AX:340um,AY:240,B=80um/P1,2:80*80um

Wafer size

4” (Gross die:84,000pcs/Good die>78,120pcs)

Chip Thickness

138um±12um B)460um±20um

Scribe line width

60um

Top metal

Al/Au/Ag

Back side metal

Al/Au/Ag/Sn

Parameter

Symbol

Conditions

Value

Unit

Reverse stand-off voltage

VRWM

5.0

V

Peak pulse power

PPP

Tp=8/20us

25*

W

Peak pulse current

IPP

Tp=8/20us

2.0*

A

Electrostatic discharge

VESD

IEC61000-4-2

Level 4

>15(Contact)

>20(Air)

KV

Max.junction temp.

Tj

150

°C

Parameter

Symbol

Condition

Min.

Typ.

Max.

Unit

Breakdown voltage

VBR

IT=1mA

6.05

7.1

V

Reverse leakage current

IR

VR=5V

0.2

uA

Clamping voltage

VC

IPP=2.0A

12.5*

V

Forward Voltage

VF

IF=10mA

1.1

V

Diode capacitance

Cj

VR=0V

f=1MHZ

9.5

pf

Characteristics TA=25°C

Notes:

(1)sampling testing:no bad dice inking/guaranteed good die >93%

(2)Testing follow customer

(3)Tj=Ta+Rth(j-a)*(pf+pr),where Rth(j-a)-thermal resistance,Pf-forward power dissipation,

Pr-revers power dissipation

(4)**For device testing

Futurewafer Technology Co.,Ltd www.futurewafer.com.tw+886-3-3573583

FE5VC2S1

EW1608D8-FW-A

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