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ADAU1361BCPZ-R7 データシート(PDF) 9 Page - Analog Devices

部品番号 ADAU1361BCPZ-R7
部品情報  Audio Codec with Integrated PLL
PDF  81 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

ADAU1361BCPZ-R7 データシート(HTML) 9 Page - Analog Devices

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ADAU1361
Rev. C | Page 8 of 80
TYPICAL CURRENT CONSUMPTION
Master clock = 12.288 MHz, input sample rate = 48 kHz, input tone = 1 kHz, normal power management settings, ADC input @ −1 dBFS,
DAC input @ 0 dBFS. For total power consumption, add the IOVDD current listed in Table 2.
Table 3.
Operating Voltage
Audio Path
Clock Generation
Typical AVDD Current
Consumption (mA)
Direct MCLK
5.24
Record stereo differential to ADC
Integer PLL
6.57
Direct MCLK
5.55
AVDD = IOVDD = 3.3 V
DAC stereo playback to line output (10 kΩ)
Integer PLL
6.90
Direct MCLK
55.5
DAC stereo playback to headphone (16 Ω)
Integer PLL
56.8
Direct MCLK
30.9
DAC stereo playback to headphone (32 Ω)
Integer PLL
32.25
Direct MCLK
56.75
DAC stereo playback to capless headphone (32 Ω)
Integer PLL
58
Direct MCLK
1.9
Record aux stereo bypass to line output (10 kΩ)
Integer PLL
3.3
Direct MCLK
4.25
Record stereo differential to ADC
Integer PLL
5.55
Direct MCLK
4.7
AVDD = IOVDD = 1.8 V
DAC stereo playback to line output (10 kΩ)
Integer PLL
5.7
Direct MCLK
30.81
DAC stereo playback to headphone (16 Ω)
Integer PLL
32
Direct MCLK
18.3
DAC stereo playback to headphone (32 Ω)
Integer PLL
19.5
Direct MCLK
32.6
DAC stereo playback to capless headphone (32 Ω)
Integer PLL
33.7
Direct MCLK
1.9
Record aux stereo bypass to line output (10 kΩ)
Integer PLL
3.07



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