TUSB564I datasheet(21/45 Pages) TI1

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TUSB564

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SLLSF29A – OCTOBER 2017 – REVISED OCTOBER 2017

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8.4.4 Linear EQ Configuration

Each of the TUSB564 receiver lanes has individual controls for receiver equalization. The receiver equalization

gain value can be controlled either through I2C registers or through GPIOs. Table 7 details the gain value for

each available combination when TUSB564 is in GPIO mode. These same options are also available in I2C

mode by updating registers DP0EQ_SEL, DP1EQ_SEL, DP2EQ_SEL, DP3EQ_SEL, EQ1_SEL, EQ2_SEL, and

SSEQ_SEL. Each of the 4-bit EQ configuration registers is mapped to the configuration pins as follows: x_SEL =

{x1[1:0],x0[1:0]} where xn[1:0] are the EQ configuration pins with pin levels mapped to 2-bit values as: 0 = 00, R

= 01, F = 10, 1 = 11.

Table 7. TUSB564 Receiver Equalization GPIO Control

Equalization

Setting #

USB3.1 UPSTREAM FACING PORTS

USB 3.1 DOWNSTREAM FACING PORT

ALL DISPLAYPORT LANES

EQ1 PIN

LEVEL

EQ0 PIN LEVEL

EQ GAIN at

2.5 GHz

(dB)

SSEQ1 PIN

LEVEL

SSEQ0 PIN

LEVEL

EQ GAIN at 2.5

GHz (dB)

DPEQ1 PIN

LEVEL

DPEQ0 PIN

LEVEL

EQ GAIN at

4.05 GHz (dB)

-0.9

-2.4

-0.3

0.2

-1.3

1.6

1.2

-0.4

3.0

2.2

0.7

4.4

3.1

1.5

5.4

4.0

2.5

6.5

4.8

3.2

7.3

5.6

4.0

8.1

6.3

4.8

8.9

7.0

5.5

9.5

7.5

6.0

10.0

8.1

6.6

10.6

8.5

7.1

11.0

9.1

7.6

11.4

9.5

8.0

11.8

9.9

8.5

12.1

8.4.5 USB3.1 Modes

The TUSB564 monitors the physical layer conditions like receiver termination, electrical idle, LFPS, and

SuperSpeed signaling rate to determine the state of the USB3.1 interface. Depending on the state of the USB

3.1 interface, the TUSB564 can be in one of four primary modes of operation when USB 3.1 is enabled (CTL0 =

H or CTLSEL0 = 1b1): Disconnect, U2/U3, U1, and U0.

The Disconnect mode is the state in which TUSB564 has not detected far-end termination on upstream facing

port (UFP) or downstream facing port (DFP). The disconnect mode is the lowest power mode of each of the four

modes. The TUSB564 remains in this mode until far-end receiver termination has been detected on both UFP

and DFP. The TUSB564 immediately exits this mode and enter U0 once far-end termination is detected.

Once in U0 mode, the TUSB564 will redrive all traffic received on UFP and DFP. U0 is the highest power mode

of all USB3.1 modes. The TUSB564 remains in U0 mode until electrical idle occurs on both UFP and DFP. Upon

detecting electrical idle, the TUSB564 immediately transitions to U1.

The U1 mode is the intermediate mode between U0 mode and U2/U3 mode. In U1 mode, the TUSB564 UFP

and DFP receiver termination remains enabled. The UFP and DFP transmitter DC common mode is maintained.

The power consumption in U1 is similar to power consumption of U0.

Next to the disconnect mode, the U2/U3 mode is next lowest power state. While in this mode, the TUSB564

periodically performs far-end receiver detection. Anytime the far-end receiver termination is not detected on

either UFP or DFP, the TUSB564 leaves the U2/U3 mode and transitions to the Disconnect mode. It also

monitors for a valid LFPS. Upon detection of a valid LFPS, the TUSB564 immediately transitions to the U0 mode.

In U2/U3 mode, the TUSB564 receiver terminations remain enabled but the TX DC common mode voltage is not

maintained.

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