AD6649 datasheet(26/41 Pages) AD

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Data Sheet

AD6649

Rev. C | Page 25 of 40

–1.000

–1.125

–1.250

–1.375

–1.500

30.72

61.44

92.16

122.88

FILTER RESPONSE (MHz)

Figure 42. Low Latency FIR Filter Pass-Band Response at 245.76 MSPS

(Fixed-Frequency NCO, 95 MHz FIR Filter Mode)

When using the tunable-frequency NCO and 100 MHz FIR filter,

the output rate is equal to the sample clock rate. The response of

the high performance FIR filter is shown in Figure 43. The detailed

pass-band response for this mode is shown in Figure 44. To place

the part into this mode, set SPI Register 0x50 to 0xA0. When

using the high performance FIR filter, the output level is −1.3 dBFS

for a corresponding input level of −1.0 dBFS at the analog inputs.

This is a result of the −0.3 dB pass-band attenuation of the FIR

filter in this mode and does not result in loss in the dynamic range

of the converter.

100

–4

–3

–2

–1

FILTER RESPONSE (MHz)

Figure 43. High Performance FIR Filter Pass-Band Response at 245.76 MSPS

(Tunable-Frequency NCO, 100 MHz FIR Filter)

100

–1.500

–1.125

–0.750

–0.375

FILTER RESPONSE (MHz)

Figure 44. High Performance FIR Filter Pass-Band Response at 245.76 MSPS

(Tunable-Frequency NCO, 100 MHz FIR Filter)

OUTPUT NCO

The output of the 32-bit fine-tuning NCO is complex and typically

centered in frequency around dc. This complex output is carried

through the stages of either the 95 MHz or 100 MHz FIR filter to

provide proper antialiasing filtering. The final NCO provides a

means to move this complex output signal away from dc so that

a real output can be provided from the AD6649. The output

NCO translates the output from dc to a frequency equal to the

output frequency divided by 4 (fS/4). This provides the user

with an output signal centered at fS/4 in frequency.

The AD6649 output NCOs within a single part or across multiple

parts can be synchronized using the external SYNC input. Bit 7

and Bit 6 of Register 0x58 allow the output NCO to be resyn-

chronized on every SYNC signal or only on the first SYNC

signal after the register is written.

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