Package outline

Features

Batch process design, excellent power dissipation offers

better reverse leakage current and thermal resistance.

Low profile surface mounted application in order to

optimize board space.

Low power loss, high efficiency.

High current capability, low forward voltage drop.

High surge capability.

Guardring for overvoltage protection.

Ultra high-speed switching.

Silicon epitaxial planar chip, metal silicon junction.

Lead-free parts meet environmental standards of

MIL-STD-19500 /228

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PFM540-AS

40

28

40

-55 to +125

SYMBOLS

V

RRM

(V)

V

RMS

V

R

(V)

(V)

*1

*2

*3

*1 Repetitive peak reverse voltage

*2 RMS voltage

*3 Continuous reverse voltage

*4 Maximum forward voltage@I =5.0A

F

V

F

(V)

*4

PFM560-AS

60

42

60

0.70

0.55

-55 to +150

0.85

PFM5100-AS

100

70

100

PARAMETER

CONDITIONS

Forward rectified current

Forward surge current

Reverse current

Diode junction capacitance

Storage temperature

See Fig.1

8.3ms single half sine-wave superimposed on

rate load (JEDEC methode)

f=1MHz and applied 4V DC reverse voltage

Symbol

MIN.

TYP.

MAX.

UNIT

I

O

I

FSM

I

R

C

J

T

STG

A

A

mA

pF

5.0

150

0.5

+

150

-

55

O

V

= V

T = 25 C

R

RRM

J

O

V

= V

T = 100 C

R

RRM

J

380

20

O

( C)

Operating

temperature

T ,

J

0.213(5.4)

0.197(5.0)

0.012(0.3) Typ.

0.106(2.7)

0.091(2.3)

0.071(1.8)

0.060(1.5)

0.040 (1.0) Typ.

0.040(1.0) Typ.

0.055(1.4)

0.063(1.6)

Dimensions in inches and (millimeters)

SMA-S

Mechanical data

Epoxy:UL94-V0 rated flame retardant

MIL-STD-750, Method 2026

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A

Thermal resistance

R

θJA

56

Junction to ambient

R

θJC

28

Junction to case

5.0A SURFACE MOUNT SCHOTTKY BARRIER RECTIFIERS - 40V-100V

PFM5 4 0-AS THRU PFM5 100-AS

1

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