17/39

M95640, M95320

Figure 13. Read from Memory Array (READ) Sequence

Note: Depending on the memory size, as shown in Table 6, the most significant address bits are Don’t Care.

Read from Memory Array (READ)

As shown in Figure 13, to send this instruction to

the device, Chip Select (S) is first driven Low. The

bits of the instruction byte and address bytes are

then shifted in, on Serial Data Input (D). The ad-

dress is loaded into an internal address register,

and the byte of data at that address is shifted out,

on Serial Data Output (Q).

If Chip Select (S) continues to be driven Low, the

internal address register is automatically incre-

mented, and the byte of data at the new address is

shifted out.

When the highest address is reached, the address

counter rolls over to zero, allowing the Read cycle

to be continued indefinitely. The whole memory

can, therefore, be read with a single READ instruc-

tion.

The Read cycle is terminated by driving Chip Se-

lect (S) High. The rising edge of the Chip Select

(S) signal can occur at any time during the cycle.

The first byte addressed can be any byte within

any page.

The instruction is not accepted, and is not execut-

ed, if a Write cycle is currently in progress.

C

D

AI01793D

S

Q

15

2

1

3456789 10

20 21 22 23 24 25 26 27

14 13

3210

28 29 30

76543

1

7

0

High Impedance

Data Out 1

Instruction

16-Bit Address

0

MSB

MSB

2

31

Data Out 2