ACE24AC02A1

Two-wire Serial EEPROM

VER 1.4

5

Device Addressing

The 2-wire serial bus protocol mandates an 8 bits device address word after a start bit condition to

invoke valid read or write command. The first four most significant bits of the device address must be

1010, which is common to all serial EEPROM devices. The next three bits are device address bits. These

three device address bits (5th, 6th and 7th) are not cared and could be coded from 000 (b) to 111 (b). Only

one ACE24AC02A1 device can be used on the on 2-wire bus. If a match is made, the EEPROM device

outputs an acknowledge signal after the 8th read/write bit, otherwise the chip will go into standby mode.

The last or 8th bit is a read/write command bit. If the 8th bit is at VIH then the chip goes into read mode.

If a “0” is detected, the device enters programming mode.

Write Operations

A.

Byte Write

A byte write operation starts when a micro-controller sends a start bit condition, follows by a proper

EEPROM device address and then a write command. If the device address bits match the chip

select address, the EEPROM device will acknowledge at the 9

then send the rest of the lower 8 bits word address. At the 18

the 8-bit address word. The micro-controller will then transmit the 8 bit data. Following an

acknowledge signal from the EEPROM at the 27

bit. After receiving the stop bit, the EEPROM will go into a self-timed programming mode during

finish and the EEPROM device will return to the standby mode.

B.

Page Write

A page write is similar to a byte write with the exception that one to sixteen bytes can be

programmed along the same page or memory row. All ACE24AC02A1 are organized to have 16

bytes per memory row or page.

With the same write command as the byte write, the micro-controller does not issue a stop bit after

sending the 1

cycle. Instead it sends out a second 8-bit data word, with the EEPROM acknowledging at the 36

th

cycle. This data sending and EEPROM acknowledging cycle repeats until the micro-controller sends

a stop bit after the n × 9

devices will return to the standby mode.

The least significant 4 bits of the word address (column address) increments internally by one after

receiving each data word. The rest of the word address bits (row address) do not change internally,

but pointing to a specific memory row or page to be programmed. The first page write data word can

be of any column address. Up to 16 data words can be loaded into a page. If more than 16 data