MSP432P411VIPZ datasheet(163/212 Pages) TI1

163 / 212 page

163

MSP432P4111, MSP432P4011, MSP432P411Y

MSP432P401Y, MSP432P411V, MSP432P401V

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SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018

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Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V

Detailed Description

(1)

Not available on the 64-pin RGC package.

(2)

Setting the PSEL1.x and PSEL0.x bits to 10 disables both the output driver and input Schmitt trigger to prevent leakage when analog

signals are applied.

6.12.9 Port P9 (P9.2 and P9.3) Input/Output With Schmitt Trigger

Port Schematic: see Figure 6-9

Table 6-71 lists the settings to select the port functions.

Table 6-71. Port P9 (P9.2 and P9.3) Pin Functions

PIN NAME (P9.x)

FUNCTION

CONTROL BITS OR SIGNALS

P9DIR.x

P9SEL1.x

P9SEL0.x

P9.2/TA3.3/L33 (1)

P9.2 (I/O)

I: 0; O: 1

TA3.CCI3A

TA3.3

L33 (2)

N/A

DVSS

P9.3/TA3.4/L32 (1)

P9.3 (I/O)

I: 0; O: 1

TA3.CCI4A

TA3.4

L32 (2)

N/A

DVSS

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