RFHCS362F datasheet(21/60 Pages) MICROCHIP

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Preliminary

DS41189A-page 21

rfHCS362G/362F

4.0

EEPROM MEMORY

ORGANIZATION

The rfHCS362G/362F contains 288 bits (18 x 16-bit

words)

EEPROM

memory

(Table 4-1).

This

EEPROM array is used to store the encryption key

information

and

synchronization

value.

Further

descriptions of the memory array is given in the follow-

ing sections.

TABLE 4-1:

EEPROM MEMORY MAP

4.1

KEY_0 - KEY_3

(64-bit Encryption Key)

The 64-bit encryption key is used to create the

encrypted message. This key is calculated and pro-

grammed during production using a key generation

algorithm. The key generation algorithm may be differ-

ent from the KEELOQ algorithm. Inputs to the key gen-

eration algorithm are typically the transmitter’s serial

number and the 64-bit manufacturer’s code. While the

key generation algorithm supplied from Microchip is the

typical method used, a user may elect to create their

own method of key generation.

4.2

SYNC (Synchronization Counter)

This is the 16-bit synchronization value that is used to

create the hopping code for transmission. This value

will be incremented after every transmission.

4.3

SEED_0, SEED_1, SEED_2,

and SEED 3 (Seed Word)

This is the four word (60 bits) seed code that will be

transmitted when seed transmission is selected. This

allows the system designer to implement the secure

learn feature or use this fixed code word as part of a dif-

ferent key generation/tracking process or purely as a

fixed code transmission.

4.4

SERIAL_0, SERIAL_1

(Encoder Serial Number)

SERIAL_0

and SERIAL_1 are the lower and upper

words of the device serial number, respectively. There

are 32 bits allocated for the serial number and a select-

able configuration bit determines whether 32 or 28 bits

will be transmitted. The serial number is meant to be

unique for every transmitter.

Word

Address

Field

Description

KEY1_0

64-bit Encryption Key1

(Word 0) LSB

KEY1_1

64-bit Encryption Key1

(Word 1)

KEY1_2

64-bit Encryption Key1

(Word 2)

KEY1_3

64-bit Encryption Key1

(Word 3) MSB

KEY2_0

64-bit Encryption Key2

(Word 0) LSB

KEY2_1

64-bit Encryption Key2

(Word 1)

KEY2_2

64-bit Encryption Key2

(Word 2)

KEY2_3

64-bit Encryption Key2

(Word 3) MSB

SEED_0

Seed value (Word 0)

LSB

SEED_1

Seed value (Word 1)

SEED_2

Seed value (Word 2)

SEED_3

Seed value (Word 3)

MSB

CONFIG_0

Configuration Word

(Word 0)

CONFIG_1

Configuration Word

(Word 1)

SERIAL_0

Serial Number

(Word 0) LSB

SERIAL_1

Serial Number

(Word 1) MSB

SYNC

Synchronization counter

RES

Reserved – Set to zero

Note:

Upper four Significant bits of SEED_3 con-

tains extra configuration information (see

Table 4-5).

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