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LP6312 データシート(PDF) 8 Page - Lowpower Semiconductor inc |
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LP6312 データシート(HTML) 8 Page - Lowpower Semiconductor inc |
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8 / 12 page ![]() LP6312-02 May.-2013 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 8 of 12 Preliminary Datasheet LP6312 Functional Description PFM/PWM Operation Each of the buck regulators can be operated at PFM/PWM mode. If the output current is less than 150mA (typ.), the regulators automatically enters the PFM mode. The output voltages and output ripples at PFM mode are higher than the output voltages and output ripples at PWM mode. But at very light load, the PFM mode operation provides higher efficiency than PWM mode operation. Enable Control The LP6312 is a high efficiency Power Management IC which is designed for IPC and OTT applications. It incorporates four 2A synchronous buck regulators and can be controlled by individual EN pins. The start-up time for each channel can be programmed by using the circuit shown as below: VIN EN GND 100kΩ 10nF~100nF VIN 5V Over Current Protection The LP6312 internal four regulators have their own cycle-by-cycle current limit circuits. When the inductor peak current exceeds the current limit threshold, the output voltage starts to drop until FB pin voltage is below the threshold, typically 30% below the reference. Thermal Shutdown The LP6312 will automatically disable if the die temperature is higher than the thermal shutdown threshold point. To avoid unstable operation, the hysteresis of thermal shutdown is about 20°C. |
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