LP6312 datasheet(9/12 Pages) POWER

9 / 12 page

LP6312-02

May.-2013

Email: marketing@lowpowersemi.com

www.lowpowersemi.com

Page 9 of 12

Preliminary Datasheet

LP6312

Application Information

Output Voltage Setting

Each of the regulators output voltage can be set via a

resistor divider (ex. R1, R2). The output voltage is

calculated by following equation:







OUT1

0.6

0.6 V

LX1

FB1

GND

1.5μH

C10

(Optional)

VOUT1

1.1 V

68KΩ

82KΩ

The following table lists common output voltage and

the corresponding R1, R2 resistance value for

reference.

VOUT

Tolerance

3.3V

510KΩ

110KΩ

1.8V

200KΩ

100KΩ

1.5V

150KΩ

100KΩ

1.1V

68KΩ

82KΩ

Output Inductor Selection

The output inductor selection mainly depends on the

amount of ripple current through the inductor ∆IL.

Large ∆IL will cause larger output voltage ripple and

loss, but the user can use a smaller inductor to save

cost and space.

On the contrary, the larger

inductance can get smaller ∆IL and thus the smaller

output voltage ripple and loss. But it will increase

the space and the cost. The inductor value can be

calculated as:

PWR

OUT

PWR

ΔI







For most applications, 1.0uH to 4.7uH inductors are

suitable for LP6312

Power Dissipation

The total output power dissipation of LP6312 should

not to exceed the maximum 5W range. The total

output power dissipation can be calculated as:

PD(TOTAL)=VOUT1×IOUT1+VOUT2×IOUT2

LP6312 データシート(PDF) 9 Page - Lowpower Semiconductor inc

LP6312 データシート(HTML) 9 Page - Lowpower Semiconductor inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12

データシートダウンロード