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ISL6277HRZ データシート(PDF) 20 Page - Renesas Technology Corp

部品番号 ISL6277HRZ
部品情報  Multiphase PWM Regulator for AMD Fusion??Mobile CPUs Using SVI 2.0
PDF  37 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ISL6277HRZ データシート(HTML) 20 Page - Renesas Technology Corp

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ISL6277
FN8270 Rev 1.00
Page 20 of 37
Mar 8, 2012
In a 1-phase configuration, the ISEN2_NB pin is tied to +5V. The
Northbridge VR operates in 1-phase CCM and enters 1-phase DE
when both PSI0_L and PSI1_L are low.
The Northbridge VR can be disabled completely by tieing
ISEN1_NB to 5V.
Dynamic Operation
Core VR and Northbridge VR behave the same during dynamic
operation. The controller responds to VID-on-the-fly changes by
slewing to the new voltage at the slew rate programmed, see
Table 4. During negative VID transitions, the output voltage
decays to the lower VID value at the slew rate determined by the
load.
The R3™ modulator intrinsically has voltage feed-forward. The
output voltage is insensitive to a fast slew rate input voltage
change.
FB2 Function
The Core VR features an FB2 pin. The FB2 function is only
available when the Core VR is in a 2-phase configuration.
Figure 18 shows the FB2 function. A switch (called FB2 switch)
turns on to short the FB and the FB2 pins when the controller is in
2-phase mode. Capacitors C3.1 and C3.2 are in parallel, serving
as part of the compensator. When the controller enters 1-phase
mode, the FB2 switch turns off, removing C3.2 and leaving only
C3.1 in the compensator. The compensator gain increases with
the removal of C3.2. By properly sizing C3.1 and C3.2, the
compensator can be optimal for both 2-phase mode and 1-phase
mode.
When the FB2 switch is off, C3.2 is disconnected from the FB pin.
However, the controller still actively drives the FB2 pin voltage to
follow the FB pin voltage such that C3.2 voltage always follows
C3.1 voltage. When the controller turns on the FB2 switch, C3.2
is reconnected to the compensator smoothly.
The FB2 function ensures excellent transient response in both
2-phase and 1-phase mode. If the FB2 function is not used,
populate C3.1 only.
Adaptive Body Diode Conduction Time
Reduction
In DCM, the controller turns off the low-side MOSFET when the
inductor current approaches zero. During on-time of the low-side
MOSFET, phase voltage is negative, and the amount is the
MOSFET rDS(ON) voltage drop, which is proportional to the
inductor current. A phase comparator inside the controller
monitors the phase voltage during on-time of the low-side
MOSFET and compares it with a threshold to determine the zero
crossing point of the inductor current. If the inductor current has
not reached zero when the low-side MOSFET turns off, it will flow
through the low-side MOSFET body diode, causing the phase
node to have a larger voltage drop until it decays to zero. If the
inductor current has crossed zero and reversed the direction
when the low-side MOSFET turns off, it will flow through the
high-side MOSFET body diode, causing the phase node to have a
spike until it decays to zero. The controller continues monitoring
the phase voltage after turning off the low-side MOSFET. To
minimize the body diode-related loss, the controller also adjusts
the phase comparator threshold voltage accordingly in iterative
steps such that the low-side MOSFET body diode conducts for
approximately 40ns.
Resistor Configuration Options
The ISL6277 uses the COMP, COMP_NB and FCCM_NB pins to
configure some functionality within the IC. Resistors from these
pins to GND are read during the first portion of the soft-start
sequence. The following sections outline how to select the
resistor values for each of these pins to correctly program the
output voltage offset of each output, the configuration of the
floating DriverX and PWM_Y output, VID-on-the-Fly slew rate, and
switching frequency used for both VRs.
VR Offset Programming
A positive or negative offset is programmed for the Core VR using
a resistor to ground from the COMP pin and the Northbridge in a
similar manner from the COMP_NB pin. Table 3 provides the
resistor value to select the desired output voltage offset
R1
E/A
R3
C2
C1
VREF
R2
C3.2
C3.1
FB
FB2
COMP
VSEN
R1
E/A
R3
C2
C1
VREF
R2
C3.2
C3.1
FB
FB2
COMP
VSEN
CONTROLLER
IN
2-PHASE MODE
CONTROLLER
IN
1-PHASE MODE
FIGURE 18. FB2 FUNCTION
TABLE 3. COMP & COMP_NB OUTPUT VOLTAGE OFFSET SELECTION
RESISTOR VALUE
[kΩ]
COMP
VCORE OFFSET [mV]
COMP_NB
OFFSET [mV]
5.62
-43.75
18.75
9.53
-37.5
31.25
13.3
-31.25
43.76
16.9
-25
50
21.0
-18.75
37.5
26.7
-12.5
25
34.0
-6.25
12.5
41.2
6.25
0
57.6
18.75
18.75
73.2
31.25
31.25
95.3
43.76
43.76
121
50
50
154
37.5
37.5
182
25
25
221
12.5
12.5
OPEN
0
0



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