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ISL6277HRZ データシート(PDF) 27 Page - Renesas Technology Corp |
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ISL6277HRZ データシート(HTML) 27 Page - Renesas Technology Corp |
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27 / 37 page ![]() ISL6277 FN8270 Rev 1.00 Page 27 of 37 Mar 8, 2012 Thermal Monitor [NTC, NTC_NB] The ISL6277 features two thermal monitors which use an external resistor network which includes an NTC thermistor to monitor motherboard temperature and alert the AMD CPU of a thermal issue. Figure 20 shows the basic thermal monitor circuit on the Core VR NTC pin. The Northbridge VR features the same thermal monitor. The controller drives a 30µA current out of the NTC pin and monitors the voltage at the pin. The current flowing out of the NTC pin creates a voltage that is compared to a warning threshold of 640mV. When the voltage at the NTC pin falls to this warning threshold or below, the controller asserts VR_HOT_L to alert the AMD CPU to throttle back load current to stabilize the motherboard temperature. A thermal fault counter begins counting toward a minimum shutdown time of 100µs. The thermal fault counter is an up/down counter, so if the voltage at the NTC pin rises above the warning threshold, it will count down and extend the time for a thermal fault to occur. The warning threshold does have 20mV of hysteresis. If the voltage at the NTC pin continues to fall down to the shutdown threshold of 580mV or below, the controller goes into shutdown and triggers a thermal fault. The PGOOD pin is pulled low and tri-states the power MOSFETs. A fault on either side will shutdown both VRs. As the board temperature rises, the NTC thermistor resistance decreases and the voltage at the NTC pin drops. When the voltage on the NTC pin drops below the over-temperature trip threshold, then VR_HOT is pulled low. The VR_HOT signal is used to change the CPU operation and decrease power consumption. With the reduction in power consumption by the CPU, the board temperature decreases and the NTC thermistor voltage rises. Once the over-temperature threshold is tripped and VR_HOT is taken low, the over-temperature threshold changes to the reset level. The addition of hysteresis to the over-temperature threshold prevents nuisance trips. Once both pin voltages exceed the over-temperature reset threshold, the pull-down on VR_HOT is released. The signal changes state and the CPU resumes normal operation. The over-temperature threshold returns to the trip level. Table 13 summarizes the fault protections. Fault Recovery All of the previously described fault conditions can be reset by bringing ENABLE low or by bringing VDD below the POR threshold. When ENABLE and VDD return to their high operating levels, the controller resets the faults and soft-start occurs. Interface Pin Protection The SVC and SVD pins feature protection diodes which must be considered when removing power to VDD and VDDIO, but leaving it applied to these pins. Figure 21 shows the basic protection on the pins. If SVC and/or SVD are powered but VDD is not, leakage current will flow from these pins to VDD. NTC RNTC VNTC - + 30µA INTERNAL TO ISL6277 FIGURE 20. CIRCUITRY ASSOCIATED WITH THE THERMAL MONITOR FEATURE OF THE ISL6277 Rs MONITOR R +V Rp WARNING 640mV SHUTDOWN 580mV VR_HOT_L TABLE 13. FAULT PROTECTION SUMMARY FAULT TYPE FAULT DURATION BEFORE PROTECTION PROTECTION ACTION FAULT RESET Overcurrent 7.5µs to 11.5µs PWM tri-state, PGOOD latched low ENABLE toggle or VDD toggle Phase Current Unbalance 1ms Way-Overcurrent (1.5xOC) Immediately Undervoltage -325mV PGOOD latched low. PWM tri-state. Overvoltage +325mV PGOOD latched low. Actively pulls the output voltage to below VID value, then tri-state. NTC Thermal 100µs min PGOOD latched low. PWM tri-state. SVC, SVD INTERNAL TO ISL6277 FIGURE 21. PROTECTION DEVICES ON THE SVC AND SVD PINS GND VDD |
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