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MPC941 データシート(PDF) 5 Page - Integrated Device Technology

部品番号 MPC941
部品情報  Low Voltage, 1:27 Clock Distribution Chip
PDF  13 Pages
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メーカー  IDT [Integrated Device Technology]
ホームページ  http://www.idt.com
Logo IDT - Integrated Device Technology

MPC941 データシート(HTML) 5 Page - Integrated Device Technology

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REVISION 10 3/18/15
5
LOW VOLTAGE, 1:27 CLOCK DISTRIBUTION CHIP
MPC941 DATA SHEET
Table 6. AC Characteristics (VCC = 2.5 V ± 5%, TA = –40 to +85C)
(1)
1. AC characteristics apply for parallel output termination of 50
 to V
TT.
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
fMAX
Maximum Output Frequency
0
250(2)
2. AC characteristics are guaranteed up to fMAX. Please refer to the applications section for information on power consumption versus operating
frequency and thermal management.
MHz
tr, tf
LVCMOS_CLK Input Rise/Fall Time
1.0(3)
3. Fast input signal transition times are required to maintain part-to-part skew specification. If part-to-part skew is not critical to the application,
signal transition times smaller than 3 ns can be applied to the MPC941.
ns
0.7 to 1.7 V
tPLH
tPHL
Propagation Delay
PECL_CLK to any Q
LVCMOS_CLK to any Q
1.3
1.0
2.1
1.8
2.9
2.6
ns
ns
tPLZ, HZ
Output Disable Time
ns
tPZL, LZ
Output Enable Time
ns
tsk(O)
Output-to-Output Skew
PECL_CLK to any Q
LVCMOS_CLK to any Q
125
125
250
250
ps
tsk(PP)
Device-to-Device Skew
PECL_CLK to any Q
LVCMOS_CLK to any Q
1200
1200
ps
ps
For a given TA and
VCC, any Q
tsk(PP)
Device-to-Device Skew
PECL_CLK to any Q
LVCMOS_CLK to any Q
1600
1600
ps
ps
For any TA, VCC
and Q
DCQ
Output Duty Cycle
PECL_CLK to any Q
LVCMOS_CLK to any Q
45
45
50
50
60
55
%
%
DCREF = 50%
DCREF = 50%
tr, tf
Output Rise/Fall Time
0.2
1.0
ns
0.6 to 1.6 V



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