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AD9858 データシート(PDF) 22 Page - Analog Devices |
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AD9858 データシート(HTML) 22 Page - Analog Devices |
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22 / 32 page  AD9858 Rev. A | Page 22 of 32 A3 A1 A2 D3 D1 D2 TWRHIGH TWRLOW TAHD TDHD TDOU TASU TWR TASU TDOU TADH TDHD TWRLOW TWRHIGH TWR SPECIFICATION 3ns 3.5ns 0ns 0ns 3ns 6ns 9ns VALUE ADDRESS SETUP TIME TO WR SIGNAL ACTIVE DATA SETUP TIME TO WR SIGNAL INACTIVE ADDRESS HOLD TIME TO WR SIGNAL INACTIVE DATA HOLD TIME TO WR SIGNAL INACTIVE WR SIGNAL MINIMUM LOW TIME WR SIGNAL MINIMUM HIGH TIME WR SIGNAL MINIMUM PERIOD DESCRIPTION D<7:0> A<5:0> WR Figure 35. I/O Port Write Cycle Timing (Parallel) A3 A1 A2 D3 D1 D2 TRDHOZ TRDLOV TADV TAHD TASU TADH TRDLOV TRDHOZ SPECIFICATION 15ns 5ns 15ns 10ns VALUE ADDRESS TO DATA VALID TIME (MAXIMUM) ADDRESS HOLD TIME TO RD SIGNAL INACTIVE (MINIMUM) RD LOW TO OUTPUT VALID (MAXIMUM) RD HIGH TO DATA THREE-STATE (MAXIMUM) DESCRIPTION D<7:0> A<5:0> RD Figure 36. I/O Port Read Cycle Timing (Parallel) |
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