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MPC866PZP133 データシート(PDF) 62 Page - Freescale Semiconductor, Inc

部品番号 MPC866PZP133
部品情報  Hardware Specifications
PDF  92 Pages
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メーカー  FREESCALE [Freescale Semiconductor, Inc]
ホームページ  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC866PZP133 データシート(HTML) 62 Page - Freescale Semiconductor, Inc

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MPC866/859 Hardware Specifications
MOTOROLA
CPM Electrical Characteristics
CPM Electrical Characteristics
Figure 61. Ethernet Collision Timing Diagram
Figure 62. Ethernet Receive Timing Diagram
135
RSTRT active delay (from TCLK1 falling edge)
10
50
ns
136
RSTRT inactive delay (from TCLK1 falling edge)
10
50
ns
137
REJECT width low
1
—
CLK
138
CLKO1 low to SDACK asserted 2
—20
ns
139
CLKO1 low to SDACK negated 2
—20
ns
1 The ratios SyncCLK/RCLK1 and SyncCLK/TCLK1 must be greater or equal to 2/1.
2 SDACK is asserted whenever the SDMA writes the incoming frame DA into memory.
Table 24. Ethernet Timing (continued)
Num
Characteristic
All Frequencies
Unit
Min
Max
CLSN(CTS1)
120
(Input)
RCLK1
121
RxD1
(Input)
121
RENA(CD1)
(Input)
125
124
123
127
126
Last Bit
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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