GPR25L25605F datasheet(7/61 Pages) GENERALPLUS

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GPR25L25605F

Proprietary & Confidential

Jan 21, 2013

Version: 1.0

6. DATA PROTECTION

During power transition, there may be some false system level

signals which result in inadvertent erasure or programming. The

device is designed to protect itself from these accidental write

cycles.

The state machine will be reset as standby mode automatically

during power up. In addition, the control register architecture of

the device constrains that the memory contents can only be

changed after specific command sequences have completed

successfully.

In the following, there are several features to protect the system

from the accidental write cycles during VCC power-up and

power-down or from system noise.

• Valid command length checking: The command length will be

checked whether it is at byte base and completed on byte

boundary.

• Write Enable (WREN) command: WREN command is required to

set the Write Enable Latch bit (WEL) before other command to

change data.

The WEL bit will return to reset stage under

following situation:

- Power-up

- Reset# pin driven low

- WRDI command completion

- WRSR command completion

- PP/PP4B command completion

- 4PP/4PP4B command completion

- SE/SE4B command completion

- BE32K/BE32K4B command completion

- BE/BE4B command completion

- CE command completion

- PGM/ERS Suspend command completion

- Softreset command completion

- WRSCUR command completion

- WPSEL command completion

- GBLK command completion

- GBULK command completion

- WREAR command completion

- WRLR command completion

- WRPASS command completion

- RDPASS command completion

- SPBLK command completion

- WRSPB command completion

- ESSPB command completion

- WRDPB command completion

- WRFBR command completion

- ESFBR command completion

• Deep Power Down Mode: By entering deep power down mode,

the flash device also is under protected from writing all commands

except Release from deep power down mode command (RDP)

and Read Electronic Signature command (RES), Erase/Program

suspend command, Erase/Program resume command and

softreset command.

• Advanced Security Features: there are some protection and

security features which protect content from inadvertent write and

hostile access.

I. Block lock protection

- The Software Protected Mode (SPM) use (BP3, BP2, BP1, BP0

and T/B) bits to allow part of memory to be protected as read

only.

The protected area definition is shown as Table 2

Protected Area Sizes, the protected areas are more flexible

which may protect various area by setting value of BP0-BP3 bits.

- The Hardware Protected Mode (HPM) use WP#/SIO2 to protect

the (BP3, BP2, BP1, BP0) bits and Status Register Write Protect

bit.

- In four I/O and QPI mode, the feature of HPM will be disabled.

Table2. Protected Area Sizes

Protected Area Sizes (TB bit = 0)

Status bit

Protect Level

BP3

BP2

BP1

BP0

256Mb

0 (none)

1 (1 block, protected block 511st)

blocks,

protected

block

510th~511st)

blocks,

protected

block

508th~511st)

blocks,

protected

block

504th~511st)

5 (16 blocks, protected block

496th~511st)

6 (32 blocks, protected block

480th~511st)

7 (64 blocks, protected block

448th~511st)

8 (128 blocks, protected block

384th~511st)

9 (256 blocks, protected block

256th~511st)

10 (512 blocks, protected all)

11 (512 blocks, protected all)

12 (512 blocks, protected all)

13 (512 blocks, protected all)

14 (512 blocks, protected all)

15 (512 blocks, protected all)

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