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GD25LD80CSFG データシート(PDF) 20 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25LD80CSFG データシート(HTML) 20 Page - GigaDevice Semiconductor (Beijing) Inc. |
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20 / 42 page ![]() 1.8V Uniform Sector Standard and Dual Serial Flash GD25LD80C 20 time duration of tRES1 (See AC Characteristics) before the device will resume normal operation and other c omm and are accepted. The CS# pin must keep high during the tRES1 time duration. When used only to obtain the Device ID while not in the Power-Down state, the command is initiated by driving the CS# pin low and shifting the instruction code “ABH” followed by 3-dummy byte. The Device ID bits are then shifted out on the falling edge of SCLK with most significant bit (MSB) first as shown in Figure15. The Device ID value for the GD25LD80C is listed in Manufacturer and Device Identification table. The Device ID can be read continuously. The command is completed by driving CS# high. When used to release the device from the Power-Down state and obtain the Device ID, the command is the same as previously described, and shown in Figure15, except that after CS# is driven high it must remain high for a time duration of tRES2 (See AC Characteristics). After this time duration the device will resume normal operation and other command will be accepted. If the Release from Power-Down and Read Device ID command is issued while an Erase, Program or Write cycle is in process (when WIP equal 1) the command is ignored and will not have any effects on the current cycle. Figure14. Release Power-Down Sequence Diagram Figure15. Release Power-Down and Read Device ID Sequence Diagram 7.15. Read Manufacture ID/ Device ID (REMS) (90H) The Read Manufacturer/Device ID command is an alternative to the Release from Power-Down / Device ID command that provides both the JEDEC assigned Manufacturer ID and the specific Device ID. The command is initiated by driving the CS# pin low and shifting the command code “90H” followed by a 24-bit address (A23-A0) of 000000H. After that, the Manufacturer ID and the Device ID are shifted out on the falling edge of SCLK with most significant bit (MSB) first as shown in Figure16. If the 24-bit address is initially set to 000001H, the Device ID will be read first. Command 0 1 2 3 4 5 6 7 ABH CS# SCLK SI 8 9 29 30 31 MSB 2 1 0 3 Dummy Bytes 23 22 32 33 34 35 36 37 38 7 6 5 4 3 2 1 0 SO MSB t RES2 Stand-by Mode Deep Power-down Mode High-Z Device ID Command 0 1 2 3 4 5 6 7 ABH CS# SCLK SI RES1 Stand-by mode Deep Power-down mode t |
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