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GD25LE256DYJS データシート(PDF) 23 Page - GigaDevice Semiconductor (Beijing) Inc.

部品番号 GD25LE256DYJS
部品情報  1.8V Uniform Sector Dual and Quad Serial Flash
PDF  83 Pages
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メーカー  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
ホームページ  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25LE256DYJS データシート(HTML) 23 Page - GigaDevice Semiconductor (Beijing) Inc.

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1.8V Uniform Sector
Dual and Quad Serial Flash
GD25LE256D
23
7.6.
Read Status Register (RDSR) (05H or 35H or 15H)
The Read Status Register (RDSR) command is for reading the Status Register. The Status Register may be read at
any time, even while a Program, Erase or Write Status Register cycle is in progress. When one of these cycles is in progress,
it is recommended to check the Write in Progress (WIP) bit before sending a new command to the device. It is also possible
to read the Status Register continuously. For command code
“05H” / “35H”, the SO will output Status Register bits S7~S0
/ S15-S8. The command
code “15H” only supports the QPI mode, the I/O0 will output Status Register S1-S0. (For 120MHz
Frequency, the 15H will better than 05H to check the WIP bit)
Figure7. Read Status Register Sequence Diagram
Command
0
1
2
3
4
5
6
7
05H or 35H
CS#
SCLK
SI
SO
High-Z
8
9 10 11 12 13 14 15
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
MSB
S7~S0 or S15~S8 out
S7~S0 or S15~S8 out
MSB
Figure7a. Read Status Register Sequence Diagram (QPI)
CS#
SCLK
IO0
IO1
IO2
IO3
0
1
2
3
4
5
Command
05H or 35H
4
4
0
0
5
5
1
1
4
5
6
2
6
2
6
7
3
7
3
7
S7-S0 or S15-S8 out
Figure7b. Read Status Register Sequence Diagram (QPI) (15H)
CS#
SCLK
IO0
IO1
IO2
IO3
0
1
2
3
4
5
Command
15H
S1
S1
S0
S0
S1-S0 out



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