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74AXP1G08 データシート(PDF) 7 Page - Nexperia B.V. All rights reserved |
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74AXP1G08 データシート(HTML) 7 Page - Nexperia B.V. All rights reserved |
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7 / 16 page ![]() Nexperia 74AXP1G08 Low-power 2-input AND gates 11.1. Waveforms and test circuit aaa-010415 VOH VI VOL A, B input Y output VM VM GND 90 % 90 % tPHL tPLH tTHL tTLH 10 % 10 % VM VM Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 6. The data input (A, B) to output (Y) propagation delays Table 9. Measurement points Supply voltage Input Output VCC VM VI tr = tf VM 0.75 V to 2.7 V 0.5VCC VCC ≤ 3.0 ns 0.5VCC CL (pF) 0 140 120 100 80 60 40 20 aaa-008211 4 2 6 8 t (ns) 0 (1) (2) (3) Tamb = -40 °C to +85 °C unless otherwise specified. (1) Minimum: VCC = 2.7 V (2) Typical: Tamb = 25 °C; VCC = 2.5 V (3) Maximum: VCC = 2.3 V Fig. 7. Additional tpd versus load capacitance CL (pF) 0 140 120 100 80 60 40 20 aaa-008212 10 t (ns) 0 8 6 4 2 (1) (2) (3) Tamb = -40 °C to +85 °C unless otherwise specified. (1) Minimum: VCC = 1.95 V (2) Typical: Tamb = 25 °C; VCC = 1.8 V (3) Maximum: VCC = 1.65 V Fig. 8. Additional tpd versus load capacitance 74AXP1G08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 3 — 18 March 2019 7 / 16 |
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