13

SCD5031 Rev B

Pre

lim

in

ar

y

TYPICAL APPLICATIONS

A typical single output forward converter application is shown in Figure 9 to aid in the following operational description.

During normal operation, the oscillator jumpstarts each switching cycle by resetting the RS latch, causing the output

stage to go high and turn on M1. Current begins to build linearly through T1 and M1 and a proportional voltage is

developed across the small sense resistor Rs. Switching spikes are filtered by C1 and R1, and the resulting sawtooth

waveform is passed into the PWM to serve as the current comparator input. Meanwhile, a portion of the output voltage

is sensed and compared to the PWM’s internal precision 2.5V reference. The difference is then amplified and level

fires and resets the latch. The output then turns off until the beginning of the next oscillator cycle when the process

repeats.

Like all current mode PWMs, the chip provides built in fault protection by limiting peak switch current on a cycle by

cycle basis. When an overload condition occurs, the sensed current reaches the current trip threshold earlier in the

switching cycle than it otherwise would and thus forces the PWM latch off until the start of the next cycle. The process

repeats until the overload condition is removed and the PWM can return to a normal duty cycle. The chip is capable of

operating in this mode indefinitely without sustaining damage.

There are two ways to set the current limit trip point. One is to simply tailor the sense resistor Rs:

Some users may find the power is dissipated in Rs to be unacceptably high. In this case, the user can fix Rs at a small

value and vary the current comparator threshold instead. Fortunately, the PWM chip provides a very convenient method

for doing so. Because the error amplifier output is internally clamped to the SOFT pin, the user need simply apply the

desired voltage level to the SOFT pin to arbitrarily lower the current comparator threshold.

FIGURE 9 – Typical Forward Converter Application

Rset

Cset

0.1µF

M2

C1

R1

Rs

T1

Isolation Barrier

3.3V, 0.5A

Opto-Isolator or

Pulse Transformer

Optional circuit

to force zero

duty cycle

M1

COMP

50%

Out A

Out B

DRVP

EN

SOFT

I

pk

1.0Vdc

R

s

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