USB3450 datasheet(24/40 Pages) SMSC

24 / 40 page

Hi-Speed USB Host or Device PHY With UTMI+ Interface

Datasheet

Revision 0.1 (05-11-05)

SMSC USB3450

DATASHEET

The receivers connect directly to the USB cable. The block contains a separate differential receiver

for HS and FS mode. Depending on the mode, the selected receiver provides the serial data stream

through the mulitplexer to the RX Logic block. The FS mode section of the FS/HS RX block also

consists of a single-ended receiver on each of the data lines to determine the correct FS LINESTATE.

For HS mode support, the FS/HS RX block contains a squelch circuit to insure that noise is never

interpreted as data.

6.4

Hi-Speed Transceiver

The SMSC Hi-Speed Transceiver consists of four blocks in the lower left corner of Figure 2.1 on

page 9. These four blocks are labeled HS XCVR, FS/LS XCVR, Resistors, and Bias Gen.

6.4.1

High Speed and Full Speed Transceivers

The USB3450 transceiver meets all requirements in the Hi-Speed specification.

The receivers connect directly to the USB cable. This block contains a separate differential receiver

for HS and FS mode. Depending on the mode, the selected receiver provides the serial data stream

through the multiplexer to the RX Logic block. The FS mode section of the FS/HS RX block also

consists of a single-ended receiver on each of the data lines to determine the correct FS linestate. For

HS mode support, the FS/HS RX block contains a squelch circuit to insure that noise is never

interpreted as data.

The transmitters connect directly to the USB cable. The block contains a separate differential FS and

HS transmitter which receive encoded, bit stuffed, serialized data from the TX Logic block and transmit

it on the USB cable.

6.4.2

Termination Resistors

The USB3450 transceiver fully integrates all of the USB termination resistors. The USB3450 includes

two 1.5kΩ pull-up resistors on DP and DM and a 15kΩ pull-down resistor on both DP and DM. In

addition the 45Ω high speed termination resistors are also integrated. These integrated resistors

require no tuning or trimming by the Link. The state of the resistors is determined by the operating

mode of the PHY. The possible valid resistor combinations are shown in Table 6.1. Operation is

guaranteed in the configurations given in Table 6.1, "DP/DM termination vs. Signaling Mode".

■

RPU_DP_EN activates the 1.5kΩ DP pull-up resistor

Figure 6.7 Receive Timing for Data Packet (with CRC-16)

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