UPD360 datasheet(76/221 Pages) MICROCHIP

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UPD360

DS00002084C-page 76

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Software polls CC_DB_ACTIVE until it reads back 0b to indicate that the CC debouncer is inactive.

Software programs the CCx Debounce Clear Enable Registers (CCx_DBCLR_EN) as required to match the

thresholds of interest.

Software programs detection for vSafe5V by setting VBUS_THR0 and VBUS_THR1 in the VBUS Threshold x

Registers (VBUS_THRx). The CCx Sample Enable Registers (CCx_SAMP_EN) is programmed debounce these

thresholds.

Software programs CC1 Pull-Down Value and CC2 Pull-Down Value in the CC Control Register (CC_CTL) to

advertise trimmed Rd.

Software enables the CC_MATCH_VLD, CC1_MATCH_CHG or CC2_MATCH_CHG interrupts via the CC Inter-

rupt Enable Register (CC_INT_EN).

Software enables VBUS_MATCH_VLD by configuring the Power Interrupt Enable Register (PWR_INT_EN).

Software enables IRQ_N via the configured respective bits, for CC_INT, PWR_INT and VBUS_INT, in the Inter-

rupt Enable Register (INT_EN).

10. Software programs the CC Comparator Control to sample both CC pins.

11. Software turns off all clock sources with the exception of 20 KHz keep-alive clock via the Clock Control Register

(CLK_CTL) to save power.

If after time tDRP an attachment is not detected, software shall configure the device to be a Source and attempt to detect

the presence of a Sink.

9.5

Collision Avoidance

An alternative mode of operation is required to enable the CC detection circuit to facilitate software implementation of

collision detection which was incorporated into version 3.0 of the USB PD Specification.

In order to avoid message collisions due to asynchronous Messaging (AMS) sent from the Sink, the Source sets Rp to

SinkTxOk (3A@5V) to indicate to the Sink that it is OK to initiate an AMS. When the Source wishes to initiate an AMS

it sets Rp to SinkTxNG (1.5A@5V). When the Sink detects that Rp is set to SinkTxOk it may initiate an AMS. When the

Sink detects that Rp is set to SinkTxNG it shall not initiate an AMS and shall only send Messages that are part of an

AMS the Source has initiated.

When operating as a Sink, a mechanism is required for quickly determining whether the Source is advertising SinkTxNG

or SinkTxOK on Rp.

A collision avoidance mechanism exists to enable software to instruct the device to sample only a single threshold on

a single CC pin. This results in a cycle through both thresholds taking only 100 us, making it easier for software to meet

the timing constraints mandated by SinkTxOk in the specification. Two CCx Sample Enable Registers (CCx_SAMP_EN)

are provided to enable software to specify which subsets of the CC thresholds shall be sampled via setting the respec-

tive bit. In the case of collision avoidance, only the threshold corresponding to SinkTxOK shall be set on the connected

CC pin. This corresponds to UFP_DFP_3A0 (CC_THR4). The CC Comparator Control field in CC Control Register

(CC_CTL) shall be set to the CC pin utilized for PD communication.

In order to prevent false positive detection of SinkTXOK when a PD packet is being transmitted or received, a debounce

value in the order to 7 ms would need to be programmed into Match Debounce Register (MATCH_DEB). Such a large

value would impair the ability of software, when operating as Sink, to detect SinkTXOK and transmit a PD message

within the time defined in the PD specification by SinkTxTime. The BLK_PD_MSG bit in CC Hardware Control Register

(CC_HW_CTL) has been incorporated to handle the above scenario and enable software to program a sub millisecond

debounce value. A minimum value of 100 us shall be used for the Match Debounce Register (MATCH_DEB) when using

this mode of operation.

The below sequence illustrates the steps to enable Collision Avoidance for a Sink. This sequence is used after a con-

nection and PD contract has been established.

Note:

Assertion of CC_MATCH_VLD indicates that the initial CC debounce of both CC pins has completed and

a valid value is available in CCx Match Registers (CCx_MATCH).

Note:

Assertion of VBUS_MATCH_VLD indicates that the initial CC debounce of both CC pins has completed

and a valid value is available in VBUS Match Register (VBUS_MATCH).

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