データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

Preview PDF HTML

JS28F128P30T85 データシート(PDF) 85 Page - Intel Corporation

部品番号 JS28F128P30T85
部品情報  Intel StrataFlash Embedded Memory
PDF  102 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  INTEL [Intel Corporation]
ホームページ  http://www.intel.com
Logo INTEL - Intel Corporation

JS28F128P30T85 データシート(HTML) 85 Page - Intel Corporation

Back Button JS28F128P30T85 Datasheet HTML 81Page - Intel Corporation JS28F128P30T85 Datasheet HTML 82Page - Intel Corporation JS28F128P30T85 Datasheet HTML 83Page - Intel Corporation JS28F128P30T85 Datasheet HTML 84Page - Intel Corporation JS28F128P30T85 Datasheet HTML 85Page - Intel Corporation JS28F128P30T85 Datasheet HTML 86Page - Intel Corporation JS28F128P30T85 Datasheet HTML 87Page - Intel Corporation JS28F128P30T85 Datasheet HTML 88Page - Intel Corporation JS28F128P30T85 Datasheet HTML 89Page - Intel Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 85 / 102 page
background image
1-Gbit P30 Family
Datasheet
Intel StrataFlash® Embedded Memory (P30)
April 2005
Order Number: 306666, Revision: 001
85
Appendix B Flowcharts
Figure 40.
Word Program Flowchart
Program
Suspend
Loop
Start
Write 0x40,
Word Address
Write Data,
Word Address
Read Status
Register
SR[7] =
Full Status
Check
(if desired)
Program
Complete
Suspend?
1
0
No
Yes
WORD PROGRAM PROCEDURE
Repeat for subsequent Word Program operations.
Full Status Register check can be done after each program, or
after a sequence of program operations.
Write 0xFF after the last operation to set to the Read Array
state.
Comments
Bus
Operation
Command
Data = 0x40
Addr = Location to program
Write
Program
Setup
Data = Data to program
Addr = Location to program
Write
Data
Status register data
Read
None
Check SR[7]
1 = WSM Ready
0 = WSM Busy
Idle
None
(Setup)
(Confirm)
FULL STATUS CHECK PROCEDURE
Read Status
Register
Program
Successful
SR[3] =
SR[1] =
0
0
SR[4] =
0
1
1
1
V
PP Range
Error
Device
Protect Error
Program
Error
If an error is detected, clear the Status Register before
continuing operations - only the Clear Staus Register
command clears the Status Register error bits.
Idle
Idle
Bus
Operation
None
None
Command
Check SR[3]:
1 = V
PP Error
Check SR[4]:
1 = Data Program Error
Comments
Idle
None
Check SR[1]:
1 = Block locked; operation aborted



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか？  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com