PFS154 datasheet(39/91 Pages) PADAUK

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PFS154

8bit MTP Type IO Controller

Page 39 of 91

PDK-DS-PFS154_CN_V105 –Jun. 9, 2020

The initial counting value of Timer16 is zero and the system will be woken up after the Timer16 counts 256

ILRC clocks.

5.8.2

Power-Down mode (“stopsys”)

Power-Down mode is the state of deeply power-saving with turning off all the oscillator modules. By using the

“stopsys” instruction, this chip will be put on Power-Down mode directly. The following shows the internal

status of PFS154 in detail when “stopsys” command is issued:

(1) All the oscillator modules are turned off

(2) MTP memory is turned off

(3) The contents of SRAM and registers remain unchanged

(4) Wake-up sources: IO toggle in digital mode (PxDIER bit is 1)

Wake-up from input pins can be considered as a continuation of normal execution. To minimize power

consumption, all the I/O pins should be carefully manipulated before entering power-down mode. The

reference sample program for power down is shown as below:

CMKMD

0xF4;

Change clock from IHRC to ILRC, disable watchdog timer

CLKMD.4 =

disable IHRC

…

while (1)

{

STOPSYS;

enter power-down

(…)

break;

if wakeup happen and check OK, then return to high speed,

else stay in power-down mode again.

}

CLKMD

0x34;

Change clock from ILRC to IHRC/2

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