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PFS172 データシート(PDF) 33 Page - PADAUK Technology.

部品番号 PFS172
部品情報  8bit MTP Type MCU with 8-bit ADC
PDF  92 Pages
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メーカー  PADAUK [PADAUK Technology.]
ホームページ  http://www.padauk.com.tw/
Logo PADAUK - PADAUK Technology.

PFS172 データシート(HTML) 33 Page - PADAUK Technology.

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PFS172
8bit MTP MCU with 8-bit ADC
©Copyright 2020, PADAUK Technology Co. Ltd
Page 33 of 92
PDK-DS-PFS172-EN_V000-May 8, 2020
5.4.5. System Clock and LVR level
The clock source of system clock comes from EOSC, IHRC and ILRC, the hardware diagram of system clock
in the PFS172 is shown as Fig.3.
Fig.3: Options of System Clock
User can choose different operating system clock depends on its requirement; the selected operating system
clock should be combined with supply voltage and LVR level to make system stable. The LVR level will be
selected during compilation, and the lowest LVR levels can be chosen for different operating frequencies.
Please refer to Section 4.1.
M
U
X
clkmd[7:5]
System
clock
CLK
÷2, ÷4, ÷8,
÷16, ÷32, ÷64
÷1, ÷4, ÷16
÷1, ÷2, ÷4, ÷8
IHRC
EOSC
ILRC



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