データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

ADL6012ACPZN-R2 データシート(PDF) 6 Page - Analog Devices

部品番号 ADL6012ACPZN-R2
部品情報  2 GHz to 67 GHz, 500 MHz Bandwidth Envelope Detector
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

ADL6012ACPZN-R2 データシート(HTML) 6 Page - Analog Devices

Back Button ADL6012ACPZN-R2 Datasheet HTML 2Page - Analog Devices ADL6012ACPZN-R2 Datasheet HTML 3Page - Analog Devices ADL6012ACPZN-R2 Datasheet HTML 4Page - Analog Devices ADL6012ACPZN-R2 Datasheet HTML 5Page - Analog Devices ADL6012ACPZN-R2 Datasheet HTML 6Page - Analog Devices ADL6012ACPZN-R2 Datasheet HTML 7Page - Analog Devices ADL6012ACPZN-R2 Datasheet HTML 8Page - Analog Devices ADL6012ACPZN-R2 Datasheet HTML 9Page - Analog Devices ADL6012ACPZN-R2 Datasheet HTML 10Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 24 page
background image
ADL6012
Data Sheet
Rev. 0 | Page 6 of 24
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Rating
Supply Voltage (VPOS to OCOM, RFCM)
5.5 V
RFIN Input Signal Power1
Average
20 dBm
Peak
23 dBm
DC Voltage at RFIN, VOCM, ENBL
−0.3 V to VPOS + 0.3 V
Case Operating Temperature Range
ADL6012ACPZN
−40°C to +105°C
ADL6012SCPZN
−55°C to +125°C
Junction Temperature (TJ)
150°C
Storage Temperature Range
−65°C to +150°C
Lead Temperature (Soldering, 60 sec)
300°C
1
Guaranteed by design. Not production tested.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the
operational section of this specification is not implied.
Operation beyond the maximum operating conditions for
extended periods may affect product reliability.
THERMAL RESISTANCE
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
θJA is the junction to ambient thermal impedance, and θJC is the
junction to case (exposed pad) thermal impedance.
Table 3. Thermal Resistance
Package Type1
θJA
θJC2
Unit
CP-10-12
74.69
11.64
°C/W
1
Thermal impedance simulated value is based on no airflow with the exposed
pad soldered to a 4-layer JEDEC board.
2
θJC is the thermal impedance from junction to the exposed pad on the
underside of the package.
ESD CAUTION



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com