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LMP7712MM データシート(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部品番号 LMP7712MM
部品情報  Single and Dual Precision, 17 MHz, Low Noise, CMOS Input Amplifiers
PDF  18 Pages
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メーカー  NSC [National Semiconductor (TI)]
ホームページ  http://www.national.com
Logo NSC - National Semiconductor (TI)

LMP7712MM データシート(HTML) 3 Page - National Semiconductor (TI)

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2.5V Electrical Characteristics (Continued)
Unless otherwise specified, all limits are guaranteed for T
A = 25˚C, V
+ = 2.5V, V− =0V,V
O =VCM =V
+/2, V
EN =V
+. Boldface
limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
I
O
Output Short Circuit Current
Sourcing to V
−
V
IN = 200 mV (Note 9)
36
30
52
mA
Sinking to V
+
V
IN = −200 mV (Note 9)
7.5
5.0
15
I
S
Supply Current
LMP7711
Enable Mode V
EN
≥ 2.1
0.95
1.30
1.65
mA
LMP7712 (per channel)
Enable Mode V
EN
≥ 2.1
1.10
1.50
1.85
Shutdown Mode (per channel)
V
EN
≤ 0.4
0.03
1
4
µA
SR
Slew Rate
A
V = +1, Rising (10% to 90%)
8.3
V/µs
A
V = +1, Falling (90% to 10%)
10.3
GBW
Gain Bandwidth Product
14
MHz
e
n
Input-Referred Voltage Noise
f = 400 Hz
6.8
nV/
f = 1 kHz
5.8
i
n
Input-Referred Current Noise
f = 1 kHz
0.01
pA/
t
on
Turn-on Time
140
ns
t
off
Turn-off Time
1000
ns
V
EN
Enable Pin Voltage Range
Enable Mode
2.1
2 - 2.5
V
Shutdown Mode
0 - 0.5
0.4
I
EN
Enable Pin Input Current
V
EN = 2.5V (Note 7)
1.5
3.0
µA
V
EN = 0V (Note 7)
0.003
0.1
THD+N
Total Harmonic Distortion +
Noise
f = 1 kHz, A
V =1,RL = 100 k
Ω
V
O = 0.9 VPP
0.003
%
f = 1 kHz, A
V =1,RL = 600
Ω
V
O = 0.9 VPP
0.004
5V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for T
A = 25˚C, V
+ = 5V, V− = 0V, V
CM =V
+/2, V
EN =V
+. Boldface limits
apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
V
OS
Input Offset Voltage
±10
±150
±450
µV
TC V
OS
Input Offset Average Drift
(Note 6)
LMP7711
–1
±4
µV/˚C
LMP7712
–1.75
I
B
Input Bias Current
(Notes 7, 8)
0.1
50
100
pA
I
OS
Input Offset Current
(Note 8)
0.01
25
50
pA
CMRR
Common Mode Rejection
Ratio
0V
≤ V
CM
≤ 3.7V
85
82
100
dB
PSRR
Power Supply Rejection Ratio
2.0V
≤ V+ ≤ 5.5V
V
− = 0V, V
CM =0
85
80
100
dB
1.8V
≤ V+ ≤ 5.5V
V
− = 0V, V
CM =0
85
98
CMVR
Input Common-Mode Voltage
Range
CMRR
≥ 80 dB
CMRR
≥ 78 dB
−0.3
–0.3
4
4
V
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