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ICS9DB102GLFT データシート(PDF) 6 Page - Integrated Circuit Systems |
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ICS9DB102GLFT データシート(HTML) 6 Page - Integrated Circuit Systems |
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6 / 10 page ![]() 6 Integrated Circuit Systems, Inc. ICS9DB102 0852C—09/12/05 SMBus Table: Device Control Register, READ/WRITE ADDRESS (DC/DD) Pin # Name Control Function Type0 1 PWD Bit 7 SW_EN Enables SMBus Control RW Functions controlled by SMBus registers Functions controlled by device pins 1 Bit 6 RW X Bit 5 RW X Bit 4 RW X Bit 3 RW X Bit 2 RW X Bit 1 PLL BW #adjust Selects PLL Bandwidth RW Low BW High BW 1 Bit 0 PLL Enable Bypasses PLL for board test RW PLL bypassed (fan out mode) PLL enabled (ZDB mode) 1 SMBus Table: Output Enable Register Pin # Name Control Function Type0 1 PWD Bit 7 RW X Bit 6 RW X Bit 5 RW X Bit 4 RW X Bit 3 RW X Bit 2 RW X Bit 1 RW X Bit 0 RW X SMBus Table: Function Select Register Pin # Name Control Function Type0 1 PWD Bit 7 RW X Bit 6 RW X Bit 5 RW X Bit 4 RW X Bit 3 RW X Bit 2 RW X Bit 1 RW X Bit 0 RW X RESERVED - RESERVED - - - - - - - - - - Byte 2 RESERVED - - - Byte 1 - - - - - - RESERVED - - - RESERVED - - RESERVED - Byte 0 - - RESERVED RESERVED - - RESERVED - RESERVED - - RESERVED RESERVED - RESERVED - RESERVED - - RESERVED - RESERVED RESERVED - RESERVED - RESERVED - - RESERVED - RESERVED |
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