データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

VR4102 データシート(PDF) 96 Page - NEC

部品番号 VR4102
部品情報  64/32-bit Microprocessor
PDF  701 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  NEC [NEC]
ホームページ  http://www.nec.com/
Logo NEC - NEC

VR4102 データシート(HTML) 96 Page - NEC

Back Button VR4102 Datasheet HTML 92Page - NEC VR4102 Datasheet HTML 93Page - NEC VR4102 Datasheet HTML 94Page - NEC VR4102 Datasheet HTML 95Page - NEC VR4102 Datasheet HTML 96Page - NEC VR4102 Datasheet HTML 97Page - NEC VR4102 Datasheet HTML 98Page - NEC VR4102 Datasheet HTML 99Page - NEC VR4102 Datasheet HTML 100Page - NEC Next Button
Zoom Inzoom in Zoom Outzoom out
 96 / 701 page
background image
CHAPTER 3 CPU INSTRUCTION SET SUMMARY
96
3.2.4 Special Instructions
Special instructions generate software exceptions.
Their formats are R-type (Syscall, Break). The Trap
instruction is available only for the VR4000 Series. All the other instructions are available for all VR Series.
Table 3-17. Special Instructions
Instruction
Format and Description
Synchronize
SYNC
Completes the load/store instruction executing in the current pipeline before the next load/store
instruction starts execution.
System Call
SYSCALL
Generates a system call exception, and then transits control to the exception handling program.
Breakpoint
BREAK
Generates a break point exception, and then transits control to the exception handling program.
Table 3-18. Special Instructions (Extended ISA) (1/2)
Instruction
Format and Description
Trap If Greater Than
Or Equal
TGE rs, rt
The contents of register rs are compared with that of register rt, treating both operands as signed
integers. If the contents of register rs are greater than or equal to that of register rt, an exception
occurs.
Trap If Greater Than
Or Equal Unsigned
TGEU rs, rt
The contents of register rs are compared with that of register rt, treating both operands as unsigned
integers. If the contents of register rs are greater than or equal to that of register rt, an exception
occurs.
Trap If Less Than
TLT rs, rt
The contents of register rs are compared with that of register rt, treating both operands as signed
integers. If the contents of register rs are less than that of register rt, an exception occurs.
Trap If Less Than
Unsigned
TLTU rs, rt
The contents of register rs are compared with that of register rt, treating both operands as unsigned
integers. If the contents of register rs are less than that of register rt, an exception occurs.
Trap If Equal
TEQ rs, rt
If the contents of registers rs and rt are equal, an exception occurs.
Trap If Not Equal
TNE rs, rt
If the contents of registers rs and rt are not equal, an exception occurs.
SPECIAL
rs
rt
funct
rd
sa
SPECIAL
rs
rt
funct
rd
sa



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com