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L6986I データシート(PDF) 30 Page - STMicroelectronics |
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L6986I データシート(HTML) 30 Page - STMicroelectronics |
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30 / 60 page ![]() 6.3 Voltage supervisor The embedded voltage supervisor (composed of the RST and the DELAY pins) monitors the regulated output voltage and keeps the RST open collector output in low impedance as long as the VOUT is out of regulation (i.e. lower than 93% of the target output voltage). In order to ensure a proper reset of digital devices with a valid power supply, the device can delay the RST assertion with a programmable time. Figure 34. Voltage supervisor operation When the RST comparator detects the output voltage is in regulation, a 2 mA internal current source starts to charge an external capacitor to implement a voltage ramp on the DELAY pin. The RST open collector is then released as soon as VDELAY = 1.234 V (see Figure 35). The CDELAY is dimensioned as follows. CDELAY=ISSCH∙TDELAY VDELAY =2μA∙TDELAY 1.234V (28) The maximum suggested capacitor value is 270 nF. The L6986I also activates internal pull-down on RST pin in case overvoltage protection is triggered. As soon as the output voltage goes below OVP threshold (20% typ.), the 2 µA internal current source starts to charge an external capacitor to implement a voltage ramp on the DELAY pin. The RST open collector is then released as soon as VDELAY = 1.234 V (see figure below). Figure 35. Voltage supervisor operation during OVP L6986I Voltage supervisor DS13647 - Rev 1 page 30/60 |
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